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authorIan Lance Taylor <iant@golang.org>2020-12-03 12:12:10 -0800
committerIan Lance Taylor <iant@golang.org>2020-12-03 12:12:10 -0800
commitf012991e2db06cc95f7aac8ecb74a1ac5f51f3d2 (patch)
tree582e5d7b377b6e973666a71960b28a7d11d72b07 /libgcc/config
parent8d703821c69062c0cd255787d793e44f1a95d463 (diff)
parent3089f5feef36810c625b5813370a97b4ecc841f8 (diff)
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Merge from trunk revision 3089f5feef36810c625b5813370a97b4ecc841f8
Diffstat (limited to 'libgcc/config')
-rw-r--r--libgcc/config/msp430/lib2hw_mul.S89
-rw-r--r--libgcc/config/msp430/lib2mul.c52
-rw-r--r--libgcc/config/msp430/t-msp4305
-rw-r--r--libgcc/config/rs6000/ppc64-fp.c237
-rw-r--r--libgcc/config/rs6000/t-linux22
-rw-r--r--libgcc/config/rs6000/t-ppc64-fp3
-rw-r--r--libgcc/config/t-vxworks1
-rw-r--r--libgcc/config/t-vxworks71
-rw-r--r--libgcc/config/vxcache.c35
9 files changed, 159 insertions, 286 deletions
diff --git a/libgcc/config/msp430/lib2hw_mul.S b/libgcc/config/msp430/lib2hw_mul.S
index de840d9..855dcd8 100644
--- a/libgcc/config/msp430/lib2hw_mul.S
+++ b/libgcc/config/msp430/lib2hw_mul.S
@@ -207,6 +207,73 @@
MOV.W &\RES3, R15 ; Ready high 16-bits for return
.endm
+.macro mult64_hw MPY32_LO MPY32_HI OP2_LO OP2_HI RES0 RES1 RES2 RES3
+;* * 64-bit hardware multiply with a 64-bit result
+;* int64 = int64 * int64
+;*
+;* - Operand 1 is in R8, R9, R10, R11
+;* - Operand 2 is in R12, R13, R14, R15
+;* - Result is in R12, R13, R14, R15
+;*
+;* 64-bit multiplication is achieved using the 32-bit hardware multiplier with
+;* the following equation:
+;* R12:R15 = (R8:R9 * R12:R13) + ((R8:R9 * R14:R15) << 32) + ((R10:R11 * R12:R13) << 32)
+;*
+;* The left shift by 32 is handled with minimal cost by saving the two low
+;* words and discarding the two high words.
+;*
+;* To ensure that the multiply is performed atomically, interrupts are
+;* disabled upon routine entry. Interrupt state is restored upon exit.
+;*
+;* Registers used: R6, R7, R8, R9, R10, R11, R12, R13, R14, R15
+;*
+;* Macro arguments are the memory locations of the hardware registers.
+;*
+#if defined(__MSP430X_LARGE__)
+ PUSHM.A #5, R10
+#elif defined(__MSP430X__)
+ PUSHM.W #5, R10
+#else
+ PUSH R10 { PUSH R9 { PUSH R8 { PUSH R7 { PUSH R6
+#endif
+ ; Multiply the low 32-bits of op0 and the high 32-bits of op1.
+ MOV.W R8, &\MPY32_LO
+ MOV.W R9, &\MPY32_HI
+ MOV.W R14, &\OP2_LO
+ MOV.W R15, &\OP2_HI
+ ; Save the low 32-bits of the result.
+ MOV.W &\RES0, R6
+ MOV.W &\RES1, R7
+ ; Multiply the high 32-bits of op0 and the low 32-bits of op1.
+ MOV.W R10, &\MPY32_LO
+ MOV.W R11, &\MPY32_HI
+ MOV.W R12, &\OP2_LO
+ MOV.W R13, &\OP2_HI
+ ; Add the low 32-bits of the result to the previously saved result.
+ ADD.W &\RES0, R6
+ ADDC.W &\RES1, R7
+ ; Multiply the low 32-bits of op0 and op1.
+ MOV.W R8, &\MPY32_LO
+ MOV.W R9, &\MPY32_HI
+ MOV.W R12, &\OP2_LO
+ MOV.W R13, &\OP2_HI
+ ; Write the return values
+ MOV.W &\RES0, R12
+ MOV.W &\RES1, R13
+ MOV.W &\RES2, R14
+ MOV.W &\RES3, R15
+ ; Add the saved low 32-bit results from earlier to the high 32-bits of
+ ; this result, effectively shifting those two results left by 32 bits.
+ ADD.W R6, R14
+ ADDC.W R7, R15
+#if defined(__MSP430X_LARGE__)
+ POPM.A #5, R10
+#elif defined(__MSP430X__)
+ POPM.W #5, R10
+#else
+ POP R6 { POP R7 { POP R8 { POP R9 { POP R10
+#endif
+.endm
;; EABI mandated names:
;;
@@ -353,9 +420,9 @@
mult1632 MPY, OP2, RESLO, RESHI
end_func __umulhisi2
- start_func __mulsi2_hw32 __mspabi_mpyl __mspabi_mpyl_hw32
+ start_func __mulsi2 __mspabi_mpyl __mspabi_mpyl_hw32
mult32_hw MPY32L, MPY32H, OP2L, OP2H, RES0, RES1
- end_func __mulsi2_hw32
+ end_func __mulsi2
start_func __mulsidi2 __mspabi_mpysll __mspabi_mpysll_hw32
mult3264_hw MPYS32L, MPYS32H, OP2L, OP2H, RES0, RES1, RES2, RES3
@@ -365,17 +432,18 @@
mult3264_hw MPY32L, MPY32H, OP2L, OP2H, RES0, RES1, RES2, RES3
end_func __umulsidi2
- ;; FIXME: Add a hardware version of this function.
- fake_func __muldi3 __mspabi_mpyll __mspabi_mpyll_hw32
+ start_func __muldi3 __mspabi_mpyll __mspabi_mpyll_hw32
+ mult64_hw MPY32L, MPY32H, OP2L, OP2H, RES0, RES1, RES2, RES3
+ end_func __muldi3
#elif defined MUL_F5
/* The F5xxx series of MCUs support the same 16-bit and 32-bit multiply
as the second generation hardware, but they are accessed from different
memory registers. */
- start_func __mulhi2_f5 __mspabi_mpyi __mspabi_mpyi_f5hw
+ start_func __mulhi2 __mspabi_mpyi __mspabi_mpyi_f5hw
mult16 MPY_F5, OP2_F5, RESLO_F5
- end_func __mulhi2_f5
+ end_func __mulhi2
start_func __mulhisi2 __mspabi_mpysl __mspabi_mpysl_f5hw
mult1632 MPYS_F5, OP2_F5, RESLO_F5, RESHI_F5
@@ -385,9 +453,9 @@
mult1632 MPY_F5, OP2_F5, RESLO_F5, RESHI_F5
end_func __umulhisi2
- start_func __mulsi2_f5 __mspabi_mpyl __mspabi_mpyl_f5hw
+ start_func __mulsi2 __mspabi_mpyl __mspabi_mpyl_f5hw
mult32_hw MPY32L_F5, MPY32H_F5, OP2L_F5, OP2H_F5, RES0_F5, RES1_F5
- end_func __mulsi2_f5
+ end_func __mulsi2
start_func __mulsidi2 __mspabi_mpysll __mspabi_mpysll_f5hw
mult3264_hw MPYS32L_F5, MPYS32H_F5, OP2L_F5, OP2H_F5, RES0_F5, RES1_F5, RES2_F5, RES3_F5
@@ -397,8 +465,9 @@
mult3264_hw MPY32L_F5, MPY32H_F5, OP2L_F5, OP2H_F5, RES0_F5, RES1_F5, RES2_F5, RES3_F5
end_func __umulsidi2
- ;; FIXME: Add a hardware version of this function.
- fake_func __muldi3 __mspabi_mpyll __mspabi_mpyll_f5hw
+ start_func __muldi3 __mspabi_mpyll __mspabi_mpyll_f5hw
+ mult64_hw MPY32L_F5, MPY32H_F5, OP2L_F5, OP2H_F5, RES0_F5, RES1_F5, RES2_F5, RES3_F5
+ end_func __muldi3
#else
#error MUL type not defined
diff --git a/libgcc/config/msp430/lib2mul.c b/libgcc/config/msp430/lib2mul.c
index 955e7bb..ca022b9 100644
--- a/libgcc/config/msp430/lib2mul.c
+++ b/libgcc/config/msp430/lib2mul.c
@@ -30,6 +30,58 @@ typedef unsigned int uint08_type __attribute__ ((mode (QI)));
#define C3B(a,b,c) a##b##c
#define C3(a,b,c) C3B(a,b,c)
+#if defined (MUL_NONE) || defined (MUL_16)
+/* __muldi3 must be excluded from libgcc.a to prevent multiple-definition
+ errors for the hwmult configurations that have their own definition.
+ However, for MUL_NONE and MUL_16, the software version is still required, so
+ the necessary preprocessed output from libgcc2.c to compile that
+ software version of __muldi3 is below. */
+typedef unsigned int USItype __attribute__ ((mode (SI)));
+typedef int DItype __attribute__ ((mode (DI)));
+typedef int SItype __attribute__ ((mode (SI)));
+struct DWstruct {SItype low, high;};
+
+typedef union
+{
+ struct DWstruct s;
+ DItype ll;
+} DWunion;
+
+DItype __muldi3 (DItype u, DItype v);
+
+DItype
+__muldi3 (DItype u, DItype v)
+{
+ const DWunion uu = {.ll = u};
+ const DWunion vv = {.ll = v};
+ /* The next block of code is expanded from the following line:
+ DWunion w = {.ll = __umulsidi3 (uu.s.low, vv.s.low)}; */
+ DWunion w;
+ USItype __x0, __x1, __x2, __x3;
+ USItype __ul, __vl, __uh, __vh;
+ __ul = ((USItype) (uu.s.low) & (((USItype) 1 << ((4 * 8) / 2)) - 1));
+ __uh = ((USItype) (uu.s.low) >> ((4 * 8) / 2));
+ __vl = ((USItype) (vv.s.low) & (((USItype) 1 << ((4 * 8) / 2)) - 1));
+ __vh = ((USItype) (vv.s.low) >> ((4 * 8) / 2));
+ __x0 = (USItype) __ul * __vl;
+ __x1 = (USItype) __ul * __vh;
+ __x2 = (USItype) __uh * __vl;
+ __x3 = (USItype) __uh * __vh;
+ __x1 += ((USItype) (__x0) >> ((4 * 8) / 2));
+ __x1 += __x2;
+ if (__x1 < __x2)
+ __x3 += ((USItype) 1 << ((4 * 8) / 2));
+ (w.s.high) = __x3 + ((USItype) (__x1) >> ((4 * 8) / 2));
+ (w.s.low) = ((USItype) (__x1) & (((USItype) 1 << ((4 * 8) / 2)) - 1))
+ * ((USItype) 1 << ((4 * 8) / 2))
+ + ((USItype) (__x0) & (((USItype) 1 << ((4 * 8) / 2)) - 1));
+
+ w.s.high += ((USItype) uu.s.low * (USItype) vv.s.high
+ + (USItype) uu.s.high * (USItype) vv.s.low);
+ return w.ll;
+}
+#endif
+
#if defined MUL_NONE
/* The software multiply library needs __mspabi_mpyll. */
diff --git a/libgcc/config/msp430/t-msp430 b/libgcc/config/msp430/t-msp430
index be56e88..9a79b5b 100644
--- a/libgcc/config/msp430/t-msp430
+++ b/libgcc/config/msp430/t-msp430
@@ -40,6 +40,11 @@ LIB2ADD = \
$(srcdir)/config/msp430/floathisf.c \
$(srcdir)/config/msp430/cmpd.c
+# 32-bit and F5series hardware multiply have their own version of this function.
+# To handle the case when there is no hardware multiply or only 16-bit hardware
+# multiply, the libgcc version has been copied to lib2mul.c.
+LIB2FUNCS_EXCLUDE += _muldi3
+
HOST_LIBGCC2_CFLAGS += -Os -ffunction-sections -fdata-sections -mhwmult=none
crtbegin_no_eh.o: $(srcdir)/crtstuff.c
diff --git a/libgcc/config/rs6000/ppc64-fp.c b/libgcc/config/rs6000/ppc64-fp.c
deleted file mode 100644
index 9ca3c71..0000000
--- a/libgcc/config/rs6000/ppc64-fp.c
+++ /dev/null
@@ -1,237 +0,0 @@
-/* Functions needed for soft-float on powerpc64-linux, copied from
- libgcc2.c with macros expanded to force the use of specific types.
-
- Copyright (C) 1989-2020 Free Software Foundation, Inc.
-
-This file is part of GCC.
-
-GCC is free software; you can redistribute it and/or modify it under
-the terms of the GNU General Public License as published by the Free
-Software Foundation; either version 3, or (at your option) any later
-version.
-
-GCC is distributed in the hope that it will be useful, but WITHOUT ANY
-WARRANTY; without even the implied warranty of MERCHANTABILITY or
-FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
-for more details.
-
-Under Section 7 of GPL version 3, you are granted additional
-permissions described in the GCC Runtime Library Exception, version
-3.1, as published by the Free Software Foundation.
-
-You should have received a copy of the GNU General Public License and
-a copy of the GCC Runtime Library Exception along with this program;
-see the files COPYING3 and COPYING.RUNTIME respectively. If not, see
-<http://www.gnu.org/licenses/>. */
-
-#if defined(__powerpc64__) || defined (__64BIT__) || defined(__ppc64__)
-#define TMODES
-#include "fp-bit.h"
-
-extern DItype __fixtfdi (TFtype);
-extern DItype __fixdfdi (DFtype);
-extern DItype __fixsfdi (SFtype);
-extern USItype __fixunsdfsi (DFtype);
-extern USItype __fixunssfsi (SFtype);
-extern TFtype __floatditf (DItype);
-extern TFtype __floatunditf (UDItype);
-extern DFtype __floatdidf (DItype);
-extern DFtype __floatundidf (UDItype);
-extern SFtype __floatdisf (DItype);
-extern SFtype __floatundisf (UDItype);
-extern DItype __fixunstfdi (TFtype);
-
-static DItype local_fixunssfdi (SFtype);
-static DItype local_fixunsdfdi (DFtype);
-
-DItype
-__fixtfdi (TFtype a)
-{
- if (a < 0)
- return - __fixunstfdi (-a);
- return __fixunstfdi (a);
-}
-
-DItype
-__fixdfdi (DFtype a)
-{
- if (a < 0)
- return - local_fixunsdfdi (-a);
- return local_fixunsdfdi (a);
-}
-
-DItype
-__fixsfdi (SFtype a)
-{
- if (a < 0)
- return - local_fixunssfdi (-a);
- return local_fixunssfdi (a);
-}
-
-USItype
-__fixunsdfsi (DFtype a)
-{
- if (a >= - (DFtype) (- ((SItype)(((USItype)1 << ((4 * 8) - 1)) - 1)) - 1))
- return (SItype) (a + (- ((SItype)(((USItype)1 << ((4 * 8) - 1)) - 1)) - 1))
- - (- ((SItype)(((USItype)1 << ((4 * 8) - 1)) - 1)) - 1);
- return (SItype) a;
-}
-
-USItype
-__fixunssfsi (SFtype a)
-{
- if (a >= - (SFtype) (- ((SItype)(((USItype)1 << ((4 * 8) - 1)) - 1)) - 1))
- return (SItype) (a + (- ((SItype)(((USItype)1 << ((4 * 8) - 1)) - 1)) - 1))
- - (- ((SItype)(((USItype)1 << ((4 * 8) - 1)) - 1)) - 1);
- return (SItype) a;
-}
-
-TFtype
-__floatditf (DItype u)
-{
- DFtype dh, dl;
-
- dh = (SItype) (u >> (sizeof (SItype) * 8));
- dh *= 2.0 * (((UDItype) 1) << ((sizeof (SItype) * 8) - 1));
- dl = (USItype) (u & ((((UDItype) 1) << (sizeof (SItype) * 8)) - 1));
-
- return (TFtype) dh + (TFtype) dl;
-}
-
-TFtype
-__floatunditf (UDItype u)
-{
- DFtype dh, dl;
-
- dh = (USItype) (u >> (sizeof (SItype) * 8));
- dh *= 2.0 * (((UDItype) 1) << ((sizeof (SItype) * 8) - 1));
- dl = (USItype) (u & ((((UDItype) 1) << (sizeof (SItype) * 8)) - 1));
-
- return (TFtype) dh + (TFtype) dl;
-}
-
-DFtype
-__floatdidf (DItype u)
-{
- DFtype d;
-
- d = (SItype) (u >> (sizeof (SItype) * 8));
- d *= 2.0 * (((UDItype) 1) << ((sizeof (SItype) * 8) - 1));
- d += (USItype) (u & ((((UDItype) 1) << (sizeof (SItype) * 8)) - 1));
-
- return d;
-}
-
-DFtype
-__floatundidf (UDItype u)
-{
- DFtype d;
-
- d = (USItype) (u >> (sizeof (SItype) * 8));
- d *= 2.0 * (((UDItype) 1) << ((sizeof (SItype) * 8) - 1));
- d += (USItype) (u & ((((UDItype) 1) << (sizeof (SItype) * 8)) - 1));
-
- return d;
-}
-
-SFtype
-__floatdisf (DItype u)
-{
- DFtype f;
-
- if (53 < (sizeof (DItype) * 8)
- && 53 > ((sizeof (DItype) * 8) - 53 + 24))
- {
- if (! (- ((DItype) 1 << 53) < u
- && u < ((DItype) 1 << 53)))
- {
- if ((UDItype) u & (((UDItype) 1 << ((sizeof (DItype) * 8) - 53)) - 1))
- {
- u &= ~ (((UDItype) 1 << ((sizeof (DItype) * 8) - 53)) - 1);
- u |= ((UDItype) 1 << ((sizeof (DItype) * 8) - 53));
- }
- }
- }
- f = (SItype) (u >> (sizeof (SItype) * 8));
- f *= 2.0 * (((UDItype) 1) << ((sizeof (SItype) * 8) - 1));
- f += (USItype) (u & ((((UDItype) 1) << (sizeof (SItype) * 8)) - 1));
-
- return (SFtype) f;
-}
-
-SFtype
-__floatundisf (UDItype u)
-{
- DFtype f;
-
- if (53 < (sizeof (DItype) * 8)
- && 53 > ((sizeof (DItype) * 8) - 53 + 24))
- {
- if (u >= ((UDItype) 1 << 53))
- {
- if ((UDItype) u & (((UDItype) 1 << ((sizeof (DItype) * 8) - 53)) - 1))
- {
- u &= ~ (((UDItype) 1 << ((sizeof (DItype) * 8) - 53)) - 1);
- u |= ((UDItype) 1 << ((sizeof (DItype) * 8) - 53));
- }
- }
- }
- f = (USItype) (u >> (sizeof (SItype) * 8));
- f *= 2.0 * (((UDItype) 1) << ((sizeof (SItype) * 8) - 1));
- f += (USItype) (u & ((((UDItype) 1) << (sizeof (SItype) * 8)) - 1));
-
- return (SFtype) f;
-}
-
-DItype
-__fixunstfdi (TFtype a)
-{
- if (a < 0)
- return 0;
-
- /* Compute high word of result, as a flonum. */
- const TFtype b = (a / (((UDItype) 1) << (sizeof (SItype) * 8)));
- /* Convert that to fixed (but not to DItype!),
- and shift it into the high word. */
- UDItype v = (USItype) b;
- v <<= (sizeof (SItype) * 8);
- /* Remove high part from the TFtype, leaving the low part as flonum. */
- a -= (TFtype) v;
- /* Convert that to fixed (but not to DItype!) and add it in.
- Sometimes A comes out negative. This is significant, since
- A has more bits than a long int does. */
- if (a < 0)
- v -= (USItype) (-a);
- else
- v += (USItype) a;
- return v;
-}
-
-/* This version is needed to prevent recursion; fixunsdfdi in libgcc
- calls fixdfdi, which in turn calls calls fixunsdfdi. */
-
-static DItype
-local_fixunsdfdi (DFtype a)
-{
- USItype hi, lo;
-
- hi = a / (((UDItype) 1) << (sizeof (SItype) * 8));
- lo = (a - ((DFtype) hi) * (((UDItype) 1) << (sizeof (SItype) * 8)));
- return ((UDItype) hi << (sizeof (SItype) * 8)) | lo;
-}
-
-/* This version is needed to prevent recursion; fixunssfdi in libgcc
- calls fixsfdi, which in turn calls calls fixunssfdi. */
-
-static DItype
-local_fixunssfdi (SFtype original_a)
-{
- DFtype a = original_a;
- USItype hi, lo;
-
- hi = a / (((UDItype) 1) << (sizeof (SItype) * 8));
- lo = (a - ((DFtype) hi) * (((UDItype) 1) << (sizeof (SItype) * 8)));
- return ((UDItype) hi << (sizeof (SItype) * 8)) | lo;
-}
-
-#endif /* __powerpc64__ */
diff --git a/libgcc/config/rs6000/t-linux b/libgcc/config/rs6000/t-linux
index ed82194..72e9c27 100644
--- a/libgcc/config/rs6000/t-linux
+++ b/libgcc/config/rs6000/t-linux
@@ -6,3 +6,25 @@ HOST_LIBGCC2_CFLAGS += -mlong-double-128
# smaller and faster libgcc code. Directly specifying -mcmodel=small
# would need to take into account targets for which -mcmodel is invalid.
HOST_LIBGCC2_CFLAGS += -mno-minimal-toc
+
+# On the modules that deal with IBM 128-bit values, make sure that TFmode uses
+# the IBM extended double format. Also turn off gnu attributes on the static
+# modules.
+IBM128_STATIC_OBJS = ibm-ldouble$(objext) _powitf2$(objext) \
+ ppc64-fp$(objext) _divtc3$(object) _multc3$(object) \
+ _fixtfdi$(object) _fixunstfdi$(object) \
+ _floatditf$(objext) _floatunsditf$(objext)
+IBM128_SHARED_OBJS = $(IBM128_STATIC_OBJS:$(objext):_s$(objext))
+IBM128_OBJS = $(IBM128_STATIC_OBJS) $(IBM128_SHARED_OBJS)
+
+IBM128_CFLAGS = -Wno-psabi -mabi=ibmlongdouble -mno-gnu-attribute
+
+$(IBM128_OBJS) : INTERNAL_CFLAGS += $(IBM128_CFLAGS)
+
+# Turn off gnu attributes for long double size on all of the shared library
+# modules, but leave it on for the static modules, except for the functions
+# that explicitly process IBM 128-bit floating point. Shared libraries only
+# have one gnu attribute for the whole library, and it can lead to warnings if
+# somebody changes the long double format. We leave it on for the static
+# modules to catch mis-compilation errors.
+gcc_s_compile += -mno-gnu-attribute
diff --git a/libgcc/config/rs6000/t-ppc64-fp b/libgcc/config/rs6000/t-ppc64-fp
index 26d1730..999679f 100644
--- a/libgcc/config/rs6000/t-ppc64-fp
+++ b/libgcc/config/rs6000/t-ppc64-fp
@@ -1,2 +1 @@
-# Can be used unconditionally, wrapped in __powerpc64__ || __64BIT__ __ppc64__.
-LIB2ADD += $(srcdir)/config/rs6000/ppc64-fp.c
+LIB2_SIDITI_CONV_FUNCS = yes
diff --git a/libgcc/config/t-vxworks b/libgcc/config/t-vxworks
index 02e2efa..b4bb85b 100644
--- a/libgcc/config/t-vxworks
+++ b/libgcc/config/t-vxworks
@@ -4,7 +4,6 @@ LIBGCC2_DEBUG_CFLAGS =
# We provide our own implementation for __clear_cache, using a
# VxWorks specific entry point.
LIB2FUNCS_EXCLUDE += _clear_cache
-LIB2ADD += $(srcdir)/config/vxcache.c
# This ensures that the correct target headers are used; some VxWorks
# system headers have names that collide with GCC's internal (host)
diff --git a/libgcc/config/t-vxworks7 b/libgcc/config/t-vxworks7
index 20c72f4..6ddd3e8 100644
--- a/libgcc/config/t-vxworks7
+++ b/libgcc/config/t-vxworks7
@@ -4,7 +4,6 @@ LIBGCC2_DEBUG_CFLAGS =
# We provide our own implementation for __clear_cache, using a
# VxWorks specific entry point.
LIB2FUNCS_EXCLUDE += _clear_cache
-LIB2ADD += $(srcdir)/config/vxcache.c
# This ensures that the correct target headers are used; some VxWorks
# system headers have names that collide with GCC's internal (host)
diff --git a/libgcc/config/vxcache.c b/libgcc/config/vxcache.c
deleted file mode 100644
index e25e0cc..0000000
--- a/libgcc/config/vxcache.c
+++ /dev/null
@@ -1,35 +0,0 @@
-/* Copyright (C) 2018-2020 Free Software Foundation, Inc.
- Contributed by Alexandre Oliva <oliva@adacore.com>
-
-This file is part of GCC.
-
-GCC is free software; you can redistribute it and/or modify it under
-the terms of the GNU General Public License as published by the Free
-Software Foundation; either version 3, or (at your option) any later
-version.
-
-GCC is distributed in the hope that it will be useful, but WITHOUT ANY
-WARRANTY; without even the implied warranty of MERCHANTABILITY or
-FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
-for more details.
-
-Under Section 7 of GPL version 3, you are granted additional
-permissions described in the GCC Runtime Library Exception, version
-3.1, as published by the Free Software Foundation.
-
-You should have received a copy of the GNU General Public License and
-a copy of the GCC Runtime Library Exception along with this program;
-see the files COPYING3 and COPYING.RUNTIME respectively. If not, see
-<http://www.gnu.org/licenses/>. */
-
-/* Instruction cache invalidation routine using VxWorks' cacheLib. */
-
-#include <vxWorks.h>
-#include <cacheLib.h>
-
-void
-__clear_cache (char *beg __attribute__((__unused__)),
- char *end __attribute__((__unused__)))
-{
- cacheTextUpdate (beg, end - beg);
-}