Merge from trunk revision 3175d40fc52fb8eb3c3b18cc343d773da24434fb.

18 files changed, 244 insertions, 73 deletions

diff --git a/libgcc/config/aarch64/aarch64-unwind.h b/libgcc/config/aarch64/aarch64-unwind.h
index ed84a96..719b58c 100644
--- a/libgcc/config/aarch64/aarch64-unwind.h
+++ b/libgcc/config/aarch64/aarch64-unwind.h
@@ -27,11 +27,8 @@ see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
 
 #define DWARF_REGNUM_AARCH64_RA_STATE 34
 
-#define MD_POST_EXTRACT_ROOT_ADDR(addr)  __builtin_aarch64_xpaclri (addr)
-#define MD_POST_EXTRACT_FRAME_ADDR(context, fs, addr) \
-  aarch64_post_extract_frame_addr (context, fs, addr)
-#define MD_POST_FROB_EH_HANDLER_ADDR(current, target, addr) \
-  aarch64_post_frob_eh_handler_addr (current, target, addr)
+#define MD_DEMANGLE_RETURN_ADDR(context, fs, addr) \
+  aarch64_demangle_return_addr (context, fs, addr)
 #define MD_FROB_UPDATE_CONTEXT(context, fs) \
   aarch64_frob_update_context (context, fs)
 
@@ -52,14 +49,16 @@ aarch64_cie_signed_with_b_key (struct _Unwind_Context *context)
   return 0;
 }
 
-/* Do AArch64 private extraction on ADDR based on context info CONTEXT and
-   unwind frame info FS.  If ADDR is signed, we do address authentication on it
-   using CFA of current frame.  */
+/* Do AArch64 private extraction on ADDR_WORD based on context info CONTEXT and
+   unwind frame info FS.  If ADDR_WORD is signed, we do address authentication
+   on it using CFA of current frame.  */
 
 static inline void *
-aarch64_post_extract_frame_addr (struct _Unwind_Context *context,
-				 _Unwind_FrameState *fs, void *addr)
+aarch64_demangle_return_addr (struct _Unwind_Context *context,
+			      _Unwind_FrameState *fs ATTRIBUTE_UNUSED,
+			      _Unwind_Word addr_word)
 {
+  void *addr = (void *)addr_word;
   if (context->flags & RA_SIGNED_BIT)
     {
       _Unwind_Word salt = (_Unwind_Word) context->cfa;
@@ -71,28 +70,6 @@ aarch64_post_extract_frame_addr (struct _Unwind_Context *context,
     return addr;
 }
 
-/* Do AArch64 private frob on exception handler's address HANDLER_ADDR before
-   installing it into current context CURRENT.  TARGET is currently not used.
-   We need to sign exception handler's address if CURRENT itself is signed.  */
-
-static inline void *
-aarch64_post_frob_eh_handler_addr (struct _Unwind_Context *current,
-				   struct _Unwind_Context *target
-				   ATTRIBUTE_UNUSED,
-				   void *handler_addr)
-{
-  if (current->flags & RA_SIGNED_BIT)
-    {
-      if (aarch64_cie_signed_with_b_key (current))
-	return __builtin_aarch64_pacib1716 (handler_addr,
-					    (_Unwind_Word) current->cfa);
-      return __builtin_aarch64_pacia1716 (handler_addr,
-					(_Unwind_Word) current->cfa);
-    }
-  else
-    return handler_addr;
-}
-
 /* Do AArch64 private initialization on CONTEXT based on frame info FS.  Mark
    CONTEXT as return address signed if bit 0 of DWARF_REGNUM_AARCH64_RA_STATE is
    set.  */
diff --git a/libgcc/config/aarch64/libgcc-softfp.ver b/libgcc/config/aarch64/libgcc-softfp.ver
new file mode 100644
index 0000000..b51a3de
--- /dev/null
+++ b/libgcc/config/aarch64/libgcc-softfp.ver
@@ -0,0 +1,28 @@
+# Copyright (C) 2020 Free Software Foundation, Inc.
+#
+# This file is part of GCC.
+#
+# GCC is free software; you can redistribute it and/or modify
+# it under the terms of the GNU General Public License as published by
+# the Free Software Foundation; either version 3, or (at your option)
+# any later version.
+#
+# GCC is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with GCC; see the file COPYING3.  If not see
+# <http://www.gnu.org/licenses/>.
+
+GCC_11.0 {
+  __divhc3
+  __extendhftf2
+  __fixhfti
+  __fixunshfti
+  __floattihf
+  __floatuntihf
+  __mulhc3
+  __trunctfhf2
+}
diff --git a/libgcc/config/aarch64/lse.S b/libgcc/config/aarch64/lse.S
index 64691c6..7496b8b 100644
--- a/libgcc/config/aarch64/lse.S
+++ b/libgcc/config/aarch64/lse.S
@@ -203,7 +203,7 @@ STARTFN	NAME(cas)
 	cmp		x0, x(tmp0)
 	ccmp		x1, x(tmp1), #0, eq
 	bne		1f
-	STXP		w(tmp2), x(tmp0), x(tmp1), [x4]
+	STXP		w(tmp2), x2, x3, [x4]
 	cbnz		w(tmp2), 0b
 1:	ret
 
@@ -283,6 +283,19 @@ ENDFN	NAME(LDNM)
 #define FEATURE_1_BTI 1
 #define FEATURE_1_PAC 2
 
+/* Supported features based on the code generation options.  */
+#if defined(__ARM_FEATURE_BTI_DEFAULT)
+# define BTI_FLAG FEATURE_1_BTI
+#else
+# define BTI_FLAG 0
+#endif
+
+#if __ARM_FEATURE_PAC_DEFAULT & 3
+# define PAC_FLAG FEATURE_1_PAC
+#else
+# define PAC_FLAG 0
+#endif
+
 /* Add a NT_GNU_PROPERTY_TYPE_0 note.  */
 #define GNU_PROPERTY(type, value)	\
   .section .note.gnu.property, "a";	\
@@ -300,7 +313,7 @@ ENDFN	NAME(LDNM)
 .section .note.GNU-stack, "", %progbits
 
 /* Add GNU property note if built with branch protection.  */
-# ifdef __ARM_FEATURE_BTI_DEFAULT
-GNU_PROPERTY (FEATURE_1_AND, FEATURE_1_BTI)
+# if (BTI_FLAG|PAC_FLAG) != 0
+GNU_PROPERTY (FEATURE_1_AND, BTI_FLAG|PAC_FLAG)
 # endif
 #endif
diff --git a/libgcc/config/aarch64/t-softfp b/libgcc/config/aarch64/t-softfp
index c4ce0dc..981ced7 100644
--- a/libgcc/config/aarch64/t-softfp
+++ b/libgcc/config/aarch64/t-softfp
@@ -8,3 +8,4 @@ softfp_extras := fixhfti fixunshfti floattihf floatuntihf
 TARGET_LIBGCC2_CFLAGS += -Wno-missing-prototypes
 
 LIB2ADD += $(srcdir)/config/aarch64/sfp-exceptions.c
+SHLIB_MAPFILES += $(srcdir)/config/aarch64/libgcc-softfp.ver
diff --git a/libgcc/config/arm/fp16.c b/libgcc/config/arm/fp16.c
index e8f7afb..3664503 100644
--- a/libgcc/config/arm/fp16.c
+++ b/libgcc/config/arm/fp16.c
@@ -52,6 +52,14 @@ binary64 =
   52     /* significand.  */
 };
 
+/* Function prototypes.  */
+unsigned short __gnu_f2h_ieee (unsigned int a);
+unsigned int __gnu_h2f_ieee (unsigned short a);
+unsigned short __gnu_f2h_alternative (unsigned int x);
+unsigned int __gnu_h2f_alternative (unsigned short a);
+unsigned short __gnu_d2h_ieee (unsigned long long a);
+unsigned short __gnu_d2h_alternative (unsigned long long x);
+
 static inline unsigned short
 __gnu_float2h_internal (const struct format* fmt,
 			unsigned long long a, int ieee)
@@ -165,7 +173,7 @@ __gnu_d2h_internal (unsigned long long a, int ieee)
   return __gnu_float2h_internal (&binary64, a, ieee);
 }
 
-unsigned int
+static inline unsigned int
 __gnu_h2f_internal(unsigned short a, int ieee)
 {
   unsigned int sign = (unsigned int)(a & 0x8000) << 16;
diff --git a/libgcc/config/i386/morestack.S b/libgcc/config/i386/morestack.S
index 519bbbc..1c31783 100644
--- a/libgcc/config/i386/morestack.S
+++ b/libgcc/config/i386/morestack.S
@@ -79,7 +79,7 @@
 #ifndef __x86_64__
 #define BACKOFF (1024)
 #else
-#define BACKOFF (1536)
+#define BACKOFF (3584)
 #endif
 
 
diff --git a/libgcc/config/i386/shadow-stack-unwind.h b/libgcc/config/i386/shadow-stack-unwind.h
index 201b2153..ff979da 100644
--- a/libgcc/config/i386/shadow-stack-unwind.h
+++ b/libgcc/config/i386/shadow-stack-unwind.h
@@ -22,14 +22,7 @@ a copy of the GCC Runtime Library Exception along with this program;
 see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
 <http://www.gnu.org/licenses/>.  */
 
-/* NB: We need _get_ssp and _inc_ssp from <cetintrin.h>.  But we can't
-   include <x86intrin.h> which ends up including <mm_malloc.h>, which
-   includes <stdlib.h> and <errno.h> unconditionally.  But we can't
-   include any libc system headers unconditionally from libgcc.  Avoid
-   including <mm_malloc.h> here by defining _IMMINTRIN_H_INCLUDED.  */
-#define _IMMINTRIN_H_INCLUDED
-#include <cetintrin.h>
-#undef _IMMINTRIN_H_INCLUDED
+#include <x86gprintrin.h>
 
 /* Unwind the shadow stack for EH.  */
 #undef _Unwind_Frames_Extra
diff --git a/libgcc/config/msp430/slli.S b/libgcc/config/msp430/slli.S
index c31e2d5..b22622e 100644
--- a/libgcc/config/msp430/slli.S
+++ b/libgcc/config/msp430/slli.S
@@ -65,6 +65,21 @@ __mspabi_slli:
 	RET
 #endif
 
+#ifdef __MSP430X__
+	.section	.text.__gnu_mspabi_sllp
+1:	ADDA	#-1,R13
+	ADDA	R12,R12
+	.global	__gnu_mspabi_sllp
+__gnu_mspabi_sllp:
+	CMP	#0,R13
+	JNZ	1b
+#ifdef __MSP430X_LARGE__
+	RETA
+#else
+	RET
+#endif /* __MSP430X_LARGE__ */
+#endif /* __MSP430X__ */
+
 /* Logical Left Shift - R12:R13 -> R12:R13.  */
 
 	.section	.text.__mspabi_slll_n
diff --git a/libgcc/config/msp430/srai.S b/libgcc/config/msp430/srai.S
index d4a47fa..0100a36 100644
--- a/libgcc/config/msp430/srai.S
+++ b/libgcc/config/msp430/srai.S
@@ -64,6 +64,21 @@ __mspabi_srai:
 	RET
 #endif
 
+#ifdef __MSP430X__
+	.section	.text.__gnu_mspabi_srap
+1:	ADDA	#-1,R13
+	RRAX.A	R12,R12
+	.global	__gnu_mspabi_srap
+__gnu_mspabi_srap:
+	CMP	#0,R13
+	JNZ	1b
+#ifdef __MSP430X_LARGE__
+	RETA
+#else
+	RET
+#endif /* __MSP430X_LARGE__ */
+#endif /* __MSP430X__ */
+
 /* Arithmetic Right Shift - R12:R13 -> R12:R13.  */
 
 	.section	.text.__mspabi_sral_n
diff --git a/libgcc/config/msp430/srli.S b/libgcc/config/msp430/srli.S
index 838c4bc..50db47c 100644
--- a/libgcc/config/msp430/srli.S
+++ b/libgcc/config/msp430/srli.S
@@ -66,6 +66,22 @@ __mspabi_srli:
 	RET
 #endif
 
+#ifdef __MSP430X__
+	.section	.text.__gnu_mspabi_srlp
+1:	ADDA	#-1,R13
+	CLRC
+	RRCX.A	R12,R12
+	.global	__gnu_mspabi_srlp
+__gnu_mspabi_srlp:
+	CMP	#0,R13
+	JNZ	1b
+#ifdef __MSP430X_LARGE__
+	RETA
+#else
+	RET
+#endif /* __MSP430X_LARGE__ */
+#endif /* __MSP430X__ */
+
 /* Logical Right Shift - R12:R13 -> R12:R13.  */
 
 	.section	.text.__mspabi_srll_n
diff --git a/libgcc/config/nvptx/atomic.c b/libgcc/config/nvptx/atomic.c
new file mode 100644
index 0000000..60f21f3
--- /dev/null
+++ b/libgcc/config/nvptx/atomic.c
@@ -0,0 +1,77 @@
+/* NVPTX atomic operations
+   Copyright (C) 2020 Free Software Foundation, Inc.
+   Contributed by Mentor Graphics.
+
+   This file is free software; you can redistribute it and/or modify it
+   under the terms of the GNU General Public License as published by the
+   Free Software Foundation; either version 3, or (at your option) any
+   later version.
+
+   This file is distributed in the hope that it will be useful, but
+   WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+   General Public License for more details.
+
+   Under Section 7 of GPL version 3, you are granted additional
+   permissions described in the GCC Runtime Library Exception, version
+   3.1, as published by the Free Software Foundation.
+
+   You should have received a copy of the GNU General Public License and
+   a copy of the GCC Runtime Library Exception along with this program;
+   see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
+   <http://www.gnu.org/licenses/>.  */
+
+#include <stdbool.h>
+
+/* Implement __sync_val_compare_and_swap and __sync_bool_compare_and_swap
+   for 1 and 2-byte values (which are not natively supported) in terms of
+   __sync_val_compare_and_swap for 4-byte values (which is supported).
+   This assumes that the contents of the word surrounding the subword
+   value that we are interested in are accessible as well (which should
+   normally be the case).  Note that if the contents of the word surrounding
+   the subword changes between the __sync_val_compare_and_swap_4 and the
+   preceeding load of oldword, while the subword does not, the implementation
+   loops, which may manifest worst-case as a hang.  */
+
+#define __SYNC_SUBWORD_COMPARE_AND_SWAP(TYPE, SIZE)			     \
+									     \
+TYPE									     \
+__sync_val_compare_and_swap_##SIZE (volatile void *vptr, TYPE oldval,	     \
+				    TYPE newval)			     \
+{									     \
+  volatile TYPE *ptr = vptr;						     \
+  volatile unsigned int *wordptr					     \
+    = (volatile unsigned int *)((__UINTPTR_TYPE__) ptr & ~3UL);	     \
+  int shift = ((__UINTPTR_TYPE__) ptr & 3UL) * 8;			     \
+  unsigned int valmask = (1 << (SIZE * 8)) - 1;				     \
+  unsigned int wordmask = ~(valmask << shift);				     \
+  unsigned int oldword = *wordptr;					     \
+  for (;;)								     \
+    {									     \
+      TYPE prevval = (oldword >> shift) & valmask;			     \
+      /* Exit if the subword value previously read from memory is not */     \
+      /* equal to the expected value OLDVAL.  */			     \
+      if (__builtin_expect (prevval != oldval, 0))			     \
+	return prevval;							     \
+      unsigned int newword = oldword & wordmask;			     \
+      newword |= ((unsigned int) newval) << shift;			     \
+      unsigned int prevword						     \
+	  = __sync_val_compare_and_swap_4 (wordptr, oldword, newword);	     \
+      /* Exit only if the compare-and-swap succeeds on the whole word */     \
+      /* (i.e. the contents of *WORDPTR have not changed since the last */   \
+      /* memory read).  */						     \
+      if (__builtin_expect (prevword == oldword, 1))			     \
+	return oldval;							     \
+      oldword = prevword;						     \
+    }									     \
+}									     \
+									     \
+bool									     \
+__sync_bool_compare_and_swap_##SIZE (volatile void *ptr, TYPE oldval,	     \
+				     TYPE newval)			     \
+{									     \
+  return __sync_val_compare_and_swap_##SIZE (ptr, oldval, newval) == oldval; \
+}
+
+__SYNC_SUBWORD_COMPARE_AND_SWAP (unsigned char, 1)
+__SYNC_SUBWORD_COMPARE_AND_SWAP (unsigned short, 2)
diff --git a/libgcc/config/nvptx/t-nvptx b/libgcc/config/nvptx/t-nvptx
index c4d20c9..ede0bf0 100644
--- a/libgcc/config/nvptx/t-nvptx
+++ b/libgcc/config/nvptx/t-nvptx
@@ -1,5 +1,6 @@
 LIB2ADD=$(srcdir)/config/nvptx/reduction.c \
-	$(srcdir)/config/nvptx/mgomp.c
+	$(srcdir)/config/nvptx/mgomp.c \
+	$(srcdir)/config/nvptx/atomic.c
 
 LIB2ADDEH=
 LIB2FUNCS_EXCLUDE=__main
diff --git a/libgcc/config/riscv/save-restore.S b/libgcc/config/riscv/save-restore.S
index 7212165..e510009 100644
--- a/libgcc/config/riscv/save-restore.S
+++ b/libgcc/config/riscv/save-restore.S
@@ -45,7 +45,7 @@ FUNC_BEGIN (__riscv_save_10)
   .cfi_restore 27
   addi sp, sp, -112
   .cfi_def_cfa_offset 112
-  li t1, -16
+  li t1, 1
 .Ls10:
   sd s10, 16(sp)
   .cfi_offset 26, -96
@@ -60,7 +60,7 @@ FUNC_BEGIN (__riscv_save_8)
   .cfi_restore 27
   addi sp, sp, -112
   .cfi_def_cfa_offset 112
-  li t1, -32
+  li t1, 2
 .Ls8:
   sd s8, 32(sp)
   .cfi_offset 24, -80
@@ -77,7 +77,7 @@ FUNC_BEGIN (__riscv_save_6)
   .cfi_restore 27
   addi sp, sp, -112
   .cfi_def_cfa_offset 112
-  li t1, -48
+  li t1, 3
 .Ls6:
   sd s6, 48(sp)
   .cfi_offset 22, -64
@@ -99,7 +99,7 @@ FUNC_BEGIN (__riscv_save_4)
   .cfi_restore 27
   addi sp, sp, -112
   .cfi_def_cfa_offset 112
-  li t1, -64
+  li t1, 4
 .Ls4:
   sd s4, 64(sp)
   .cfi_offset 20, -48
@@ -123,7 +123,7 @@ FUNC_BEGIN (__riscv_save_2)
   .cfi_restore 27
   addi sp, sp, -112
   .cfi_def_cfa_offset 112
-  li t1, -80
+  li t1, 5
 .Ls2:
   sd s2, 80(sp)
   .cfi_offset 18, -32
@@ -133,9 +133,10 @@ FUNC_BEGIN (__riscv_save_2)
   .cfi_offset 8, -16
   sd ra, 104(sp)
   .cfi_offset 1, -8
+  slli t1, t1, 4
   # CFA info is not correct in next 2 instruction since t1's
   # value is depend on how may register really save.
-  sub sp, sp, t1
+  add sp, sp, t1
   jr t0
   .cfi_endproc
 FUNC_END (__riscv_save_12)
diff --git a/libgcc/config/riscv/t-elf b/libgcc/config/riscv/t-elf
index dbc8f85..415e1ff 100644
--- a/libgcc/config/riscv/t-elf
+++ b/libgcc/config/riscv/t-elf
@@ -4,3 +4,5 @@ LIB2ADD += $(srcdir)/config/riscv/save-restore.S \
 	   $(srcdir)/config/riscv/div.S \
 	   $(srcdir)/config/riscv/atomic.c \
 
+# Avoid the full unwinder being pulled along with the division libcalls.
+LIB2_DIVMOD_EXCEPTION_FLAGS := -fasynchronous-unwind-tables
diff --git a/libgcc/config/rs6000/morestack.S b/libgcc/config/rs6000/morestack.S
index 1b8ebb5..ac33c88 100644
--- a/libgcc/config/rs6000/morestack.S
+++ b/libgcc/config/rs6000/morestack.S
@@ -55,11 +55,18 @@
 	.type name,@function;				\
 name##:
 
+#ifdef __PCREL__
+#define ENTRY(name)					\
+	ENTRY0(name);					\
+	.localentry name, 1
+#define JUMP_TARGET(name) name##@notoc
+#else
 #define ENTRY(name)					\
 	ENTRY0(name);					\
 0:	addis %r2,%r12,.TOC.-0b@ha;			\
         addi %r2,%r2,.TOC.-0b@l;			\
 	.localentry name, .-name
+#endif
 
 #else
 
@@ -81,6 +88,9 @@ BODY_LABEL(name)##:
 
 #define SIZE(name) .size name, .-BODY_LABEL(name)
 
+#ifndef JUMP_TARGET
+#define JUMP_TARGET(name) name
+#endif
 
 	.text
 # Just like __morestack, but with larger excess allocation
@@ -156,7 +166,7 @@ ENTRY0(__morestack)
 	stdu %r1,-MORESTACK_FRAMESIZE(%r1)
 
 	# void __morestack_block_signals (void)
-	bl __morestack_block_signals
+	bl JUMP_TARGET(__morestack_block_signals)
 
 	# void *__generic_morestack (size_t *pframe_size,
 	#			     void *old_stack,
@@ -164,7 +174,7 @@ ENTRY0(__morestack)
 	addi %r3,%r29,NEWSTACKSIZE_SAVE
 	mr %r4,%r29
 	li %r5,0			# no copying from old stack
-	bl __generic_morestack
+	bl JUMP_TARGET(__generic_morestack)
 
 # Start using new stack
 	stdu %r29,-32(%r3)		# back-chain
@@ -183,7 +193,7 @@ ENTRY0(__morestack)
 	std %r3,-0x7000-64(%r13)	# tcbhead_t.__private_ss
 
 	# void __morestack_unblock_signals (void)
-	bl __morestack_unblock_signals
+	bl JUMP_TARGET(__morestack_unblock_signals)
 
 # Set up for a call to the target function, located 3
 # instructions after __morestack's return address.
@@ -218,11 +228,11 @@ ENTRY0(__morestack)
 	std %r10,PARAMREG_SAVE+56(%r29)
 #endif
 
-	bl __morestack_block_signals
+	bl JUMP_TARGET(__morestack_block_signals)
 
 	# void *__generic_releasestack (size_t *pavailable)
 	addi %r3,%r29,NEWSTACKSIZE_SAVE
-	bl __generic_releasestack
+	bl JUMP_TARGET(__generic_releasestack)
 
 # Reset __private_ss stack guard to value for old stack
 	ld %r12,NEWSTACKSIZE_SAVE(%r29)
@@ -231,7 +241,7 @@ ENTRY0(__morestack)
 .LEHE0:
 	std %r3,-0x7000-64(%r13)	# tcbhead_t.__private_ss
 
-	bl __morestack_unblock_signals
+	bl JUMP_TARGET(__morestack_unblock_signals)
 
 # Use old stack again.
 	mr %r1,%r29
@@ -260,13 +270,15 @@ cleanup:
 	std %r3,PARAMREG_SAVE(%r29)	# Save exception header
 	# size_t __generic_findstack (void *stack)
 	mr %r3,%r29
-	bl __generic_findstack
+	bl JUMP_TARGET(__generic_findstack)
 	sub %r3,%r29,%r3
 	addi %r3,%r3,BACKOFF
 	std %r3,-0x7000-64(%r13)	# tcbhead_t.__private_ss
 	ld %r3,PARAMREG_SAVE(%r29)
-	bl _Unwind_Resume
+	bl JUMP_TARGET(_Unwind_Resume)
+#ifndef __PCREL__
 	nop
+#endif
 	.cfi_endproc
 	SIZE (__morestack)
 
@@ -310,7 +322,7 @@ ENTRY(__stack_split_initialize)
 	# void __generic_morestack_set_initial_sp (void *sp, size_t len)
 	mr %r3,%r1
 	li %r4, 0x4000
-	b __generic_morestack_set_initial_sp
+	b JUMP_TARGET(__generic_morestack_set_initial_sp)
 # The lack of .cfi_endproc here is deliberate.  This function and the
 # following ones can all use the default FDE.
 	SIZE (__stack_split_initialize)
diff --git a/libgcc/config/rs6000/t-linux b/libgcc/config/rs6000/t-linux
index 4f6d4c4..ed82194 100644
--- a/libgcc/config/rs6000/t-linux
+++ b/libgcc/config/rs6000/t-linux
@@ -1,3 +1,8 @@
 SHLIB_MAPFILES += $(srcdir)/config/rs6000/libgcc-glibc.ver
 
-HOST_LIBGCC2_CFLAGS += -mlong-double-128 -mno-minimal-toc
+HOST_LIBGCC2_CFLAGS += -mlong-double-128
+
+# This is a way of selecting -mcmodel=small for ppc64, which gives
+# smaller and faster libgcc code.  Directly specifying -mcmodel=small
+# would need to take into account targets for which -mcmodel is invalid.
+HOST_LIBGCC2_CFLAGS += -mno-minimal-toc
diff --git a/libgcc/config/rs6000/t-slibgcc-aix b/libgcc/config/rs6000/t-slibgcc-aix
index e5f8a02..a6c5cee 100644
--- a/libgcc/config/rs6000/t-slibgcc-aix
+++ b/libgcc/config/rs6000/t-slibgcc-aix
@@ -90,29 +90,30 @@ AR_FLAGS_FOR_TARGET = -X32_64
 
 # Build and install AIX-style FAT libraries
 ifeq ($(MULTIBUILDTOP),)
-BITS=$(shell if test -z "`ar -X64 t libgcc_s.a`" ; then \
+BITS=$(shell if test -z "`$(CC) -x c -E /dev/null -g3 -o - | grep 64BIT`" ; then \
     echo '64'; else echo '32'; fi)
+ARX=$(shell echo $(AR) | sed -e 's/-X[^ ]*//g')
 all: all-multi
 ifeq ($(enable_shared),yes)
-	ar -X$(BITS) x ../ppc$(BITS)/libgcc/libgcc_s.a shr.o
-	ar -X$(BITS) rc ./libgcc_s.a shr.o
+	$(ARX) -X$(BITS) x ../ppc$(BITS)/libgcc/libgcc_s.a shr.o
+	$(ARX) -X$(BITS) rc ./libgcc_s.a shr.o
 	rm -f shr.o
-	ar -X$(BITS) x ../pthread/ppc$(BITS)/libgcc/libgcc_s.a shr.o
-	ar -X$(BITS) rc ../pthread/libgcc/libgcc_s.a shr.o
+	$(ARX) -X$(BITS) x ../pthread/ppc$(BITS)/libgcc/libgcc_s.a shr.o
+	$(ARX) -X$(BITS) rc ../pthread/libgcc/libgcc_s.a shr.o
 	rm -f shr.o
 endif
-	ar -X$(BITS) rc libgcc.a \
+	$(ARX) -X$(BITS) rc libgcc.a \
 	    $(addprefix ../ppc$(BITS)/libgcc/,$(libgcc-objects))
-	ar -X$(BITS) rc libgcc_eh.a \
+	$(ARX) -X$(BITS) rc libgcc_eh.a \
 	    $(addprefix ../ppc$(BITS)/libgcc/,$(libgcc-eh-objects))
-	ar -X$(BITS) rc ../pthread/libgcc/libgcc.a \
+	$(ARX) -X$(BITS) rc ../pthread/libgcc/libgcc.a \
 	    $(addprefix ../pthread/ppc$(BITS)/libgcc/,$(libgcc-objects))
-	ar -X$(BITS) rc ../pthread/libgcc/libgcc_eh.a \
+	$(ARX) -X$(BITS) rc ../pthread/libgcc/libgcc_eh.a \
 	    $(addprefix ../pthread/ppc$(BITS)/libgcc/,$(libgcc-eh-objects))
 ifeq ($(enable_gcov),yes)
-	ar -X$(BITS) rc libgcov.a \
+	$(ARX) -X$(BITS) rc libgcov.a \
 	    $(addprefix ../ppc$(BITS)/libgcc/,$(libgcov-objects))
-	ar -X$(BITS) rc ../pthread/libgcc/libgcov.a \
+	$(ARX) -X$(BITS) rc ../pthread/libgcc/libgcov.a \
 	    $(addprefix ../pthread/ppc$(BITS)/libgcc/,$(libgcov-objects))
 endif
 	$(MAKE) install-leaf DESTDIR=$(gcc_objdir) \
diff --git a/libgcc/config/rs6000/tramp.S b/libgcc/config/rs6000/tramp.S
index 9b8fcfe..b165faa 100644
--- a/libgcc/config/rs6000/tramp.S
+++ b/libgcc/config/rs6000/tramp.S
@@ -140,15 +140,21 @@ trampoline_size = .-trampoline_initial
 /* R5 = function address */
 /* R6 = static chain */
 
+#ifndef __PCREL__
 	.pushsection ".toc","aw"
 .LC0:
 	.quad	trampoline_initial-8
 	.popsection
+#endif
 
 FUNC_START(__trampoline_setup)
 	.cfi_startproc
+#ifdef __PCREL__
+	pla 7,(trampoline_initial-8)@pcrel
+#else
 	addis 7,2,.LC0@toc@ha
 	ld 7,.LC0@toc@l(7)	/* trampoline address -8 */
+#endif
 
 	li	r8,trampoline_size	/* verify that the trampoline is big enough */
 	cmpw	cr1,r8,r4