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authorXiao Zeng <zengxiao@eswincomputing.com>2024-05-06 15:39:12 -0600
committerJeff Law <jlaw@ventanamicro.com>2024-05-06 15:39:12 -0600
commit8c7cee80eb50792e57d514be1418c453ddd1073e (patch)
tree687cc6b841eb17264f4b597b7ecbf9e203661210 /libgcc/config/riscv
parent6ffea3e37380860507cce08af42a997fbdb5d754 (diff)
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[RISC-V] Add support for _Bfloat16
1 At point <https://github.com/riscv/riscv-bfloat16>, BF16 has already been completed "post public review". 2 LLVM has also added support for RISCV BF16 in <https://reviews.llvm.org/D151313> and <https://reviews.llvm.org/D150929>. 3 According to the discussion <https://github.com/riscv-non-isa/riscv-elf-psabi-doc/pull/367>, this use __bf16 and use DF16b in riscv_mangle_type like x86. Below test are passed for this patch * The riscv fully regression test. gcc/ChangeLog: * config/riscv/iterators.md: New mode iterator HFBF. * config/riscv/riscv-builtins.cc (riscv_init_builtin_types): Initialize data type _Bfloat16. * config/riscv/riscv-modes.def (FLOAT_MODE): New. (ADJUST_FLOAT_FORMAT): New. * config/riscv/riscv.cc (riscv_mangle_type): Support for BFmode. (riscv_scalar_mode_supported_p): Ditto. (riscv_libgcc_floating_mode_supported_p): Ditto. (riscv_init_libfuncs): Set the conversion method for BFmode and HFmode. (riscv_block_arith_comp_libfuncs_for_mode): Set the arithmetic and comparison libfuncs for the mode. * config/riscv/riscv.md (mode" ): Add BF. (movhf): Support for BFmode. (mov<mode>): Ditto. (*movhf_softfloat): Ditto. (*mov<mode>_softfloat): Ditto. libgcc/ChangeLog: * config/riscv/sfp-machine.h (_FP_NANFRAC_B): New. (_FP_NANSIGN_B): Ditto. * config/riscv/t-softfp32: Add support for BF16 libfuncs. * config/riscv/t-softfp64: Ditto. * soft-fp/floatsibf.c: For si -> bf16. * soft-fp/floatunsibf.c: For unsi -> bf16. gcc/testsuite/ChangeLog: * gcc.target/riscv/bf16_arithmetic.c: New test. * gcc.target/riscv/bf16_call.c: New test. * gcc.target/riscv/bf16_comparison.c: New test. * gcc.target/riscv/bf16_float_libcall_convert.c: New test. * gcc.target/riscv/bf16_integer_libcall_convert.c: New test. Co-authored-by: Jin Ma <jinma@linux.alibaba.com>
Diffstat (limited to 'libgcc/config/riscv')
-rw-r--r--libgcc/config/riscv/sfp-machine.h3
-rw-r--r--libgcc/config/riscv/t-softfp3210
-rw-r--r--libgcc/config/riscv/t-softfp643
3 files changed, 12 insertions, 4 deletions
diff --git a/libgcc/config/riscv/sfp-machine.h b/libgcc/config/riscv/sfp-machine.h
index 0ad9708..9d3552c 100644
--- a/libgcc/config/riscv/sfp-machine.h
+++ b/libgcc/config/riscv/sfp-machine.h
@@ -41,6 +41,7 @@ see the files COPYING3 and COPYING.RUNTIME respectively. If not, see
#define _FP_DIV_MEAT_D(R,X,Y) _FP_DIV_MEAT_2_udiv(D,R,X,Y)
#define _FP_DIV_MEAT_Q(R,X,Y) _FP_DIV_MEAT_4_udiv(Q,R,X,Y)
+#define _FP_NANFRAC_B _FP_QNANBIT_B
#define _FP_NANFRAC_H _FP_QNANBIT_H
#define _FP_NANFRAC_S _FP_QNANBIT_S
#define _FP_NANFRAC_D _FP_QNANBIT_D, 0
@@ -64,6 +65,7 @@ see the files COPYING3 and COPYING.RUNTIME respectively. If not, see
#define _FP_DIV_MEAT_D(R,X,Y) _FP_DIV_MEAT_1_udiv_norm(D,R,X,Y)
#define _FP_DIV_MEAT_Q(R,X,Y) _FP_DIV_MEAT_2_udiv(Q,R,X,Y)
+#define _FP_NANFRAC_B _FP_QNANBIT_B
#define _FP_NANFRAC_H _FP_QNANBIT_H
#define _FP_NANFRAC_S _FP_QNANBIT_S
#define _FP_NANFRAC_D _FP_QNANBIT_D
@@ -82,6 +84,7 @@ typedef unsigned int UTItype __attribute__ ((mode (TI)));
typedef int __gcc_CMPtype __attribute__ ((mode (__libgcc_cmp_return__)));
#define CMPtype __gcc_CMPtype
+#define _FP_NANSIGN_B 0
#define _FP_NANSIGN_H 0
#define _FP_NANSIGN_S 0
#define _FP_NANSIGN_D 0
diff --git a/libgcc/config/riscv/t-softfp32 b/libgcc/config/riscv/t-softfp32
index 1a3b1ca..da55eb3 100644
--- a/libgcc/config/riscv/t-softfp32
+++ b/libgcc/config/riscv/t-softfp32
@@ -42,7 +42,11 @@ softfp_extras += divsf3 divdf3 divtf3
endif
-softfp_extensions += hfsf hfdf hftf
-softfp_truncations += tfhf dfhf sfhf
+softfp_extensions += hfsf hfdf hftf \
+ bfsf
+softfp_truncations += tfhf dfhf sfhf \
+ tfbf dfbf sfbf \
+ hfbf bfhf
softfp_extras += fixhfsi fixhfdi fixunshfsi fixunshfdi \
- floatsihf floatdihf floatunsihf floatundihf
+ floatsihf floatdihf floatunsihf floatundihf \
+ floatsibf floatdibf floatunsibf floatundibf
diff --git a/libgcc/config/riscv/t-softfp64 b/libgcc/config/riscv/t-softfp64
index c87d242..936e58e 100644
--- a/libgcc/config/riscv/t-softfp64
+++ b/libgcc/config/riscv/t-softfp64
@@ -1,4 +1,5 @@
include $(srcdir)/config/riscv/t-softfp32
softfp_int_modes += ti
-softfp_extras += fixhfti fixunshfti floattihf floatuntihf
+softfp_extras += fixhfti fixunshfti floattihf floatuntihf \
+ floattibf floatuntibf