aarch64: Handle ASHIFTRT in patterns for shrn2

Similar to the low-half patterns, we want to match both ashiftrt and
lshiftrt with the truncate for SHRN2.  We reuse the SHIFTRT iterator
and the AARCH64_VALID_SHRN_OP check to help, but because we expand the
high-half patterns by their gen_* names we need to disambiguate all the
different trunc+shift combinations in the pattern name, which leads to a
slight renaming of the builtins.  The AARCH64_VALID_SHRN_OP check on the
expander and the define_insns ensures that no invalid combination ends
up getting matched.

Bootstrapped and tested on aarch64-none-linux-gnu and
aarch64_be-none-elf.

gcc/ChangeLog:

	* config/aarch64/aarch64-simd-builtins.def (shrn2_n): Rename builtins to...
	(ushrn2_n): ... This.
	(sqshrn2_n): Rename builtins to...
	(ssqshrn2_n): ... This.
	(uqshrn2_n): Rename builtins to...
	(uqushrn2_n): ... This.
	* config/aarch64/arm_neon.h (vqshrn_high_n_s16): Adjust for the above.
	(vqshrn_high_n_s32): Likewise.
	(vqshrn_high_n_s64): Likewise.
	(vqshrn_high_n_u16): Likewise.
	(vqshrn_high_n_u32): Likewise.
	(vqshrn_high_n_u64): Likewise.
	(vshrn_high_n_s16): Likewise.
	(vshrn_high_n_s32): Likewise.
	(vshrn_high_n_s64): Likewise.
	(vshrn_high_n_u16): Likewise.
	(vshrn_high_n_u32): Likewise.
	(vshrn_high_n_u64): Likewise.
	* config/aarch64/aarch64-simd.md (aarch64_<shrn_op>shrn2_n<mode>_insn_le):
	Rename to...
	(aarch64_<shrn_op><sra_op>shrn2_n<mode>_insn_le): ... This.
	Use SHIFTRT iterator and AARCH64_VALID_SHRN_OP check.
	(aarch64_<shrn_op>shrn2_n<mode>_insn_be): Rename to...
	(aarch64_<shrn_op><sra_op>shrn2_n<mode>_insn_be): ... This.
	Use SHIFTRT iterator and AARCH64_VALID_SHRN_OP check.
	(aarch64_<shrn_op>shrn2_n<mode>): Rename to...
	(aarch64_<shrn_op><sra_op>shrn2_n<mode>): ... This.
	Update expander for the above.

0 files changed, 0 insertions, 0 deletions