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author | Xi Ruoyao <xry111@xry111.site> | 2022-07-06 23:22:29 +0800 |
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committer | Xi Ruoyao <xry111@xry111.site> | 2022-07-10 11:36:22 +0800 |
commit | a8cfc36b9964e5b62433269182232e59d82d6a23 (patch) | |
tree | dc93a0730ef26fb08ad70198cb3098c12ac87426 /libcpp | |
parent | a5d3826f7648c4c7763dba8882e6722deae0c116 (diff) | |
download | gcc-a8cfc36b9964e5b62433269182232e59d82d6a23.zip gcc-a8cfc36b9964e5b62433269182232e59d82d6a23.tar.gz gcc-a8cfc36b9964e5b62433269182232e59d82d6a23.tar.bz2 |
loongarch: avoid unnecessary sign-extend after 32-bit division
Like add.w/sub.w/mul.w, div.w/mod.w/div.wu/mod.wu also sign-extend the
output on LA64. But, LoongArch v1.00 mandates that the inputs of 32-bit
division to be sign-extended so we have to expand 32-bit division into
RTL sequences.
We defined div.w/mod.w/div.wu/mod.wu as a (DI, DI) -> SI instruction.
This definition does not indicate the fact that these instructions will
store the result as sign-extended value in a 64-bit GR. Then the
compiler would emit unnecessary sign-extend operations. For example:
int div(int a, int b) { return a / b; }
was compiled to:
div.w $r4, $r4, $r5
slli.w $r4, $r4, 0 # this is unnecessary
jr $r1
To remove this unnecessary operation, we change the division
instructions to (DI, DI) -> DI and describe the sign-extend behavior
explicitly in the RTL template. In the expander for 32-bit division we
then use simplify_gen_subreg to extract the lower 32 bits.
gcc/ChangeLog:
* config/loongarch/loongarch.md (<any_div>di3_fake): Describe
the sign-extend of result in the RTL template.
(<any_div><mode>3): Adjust for <any_div>di3_fake change.
gcc/testsuite/ChangeLog:
* gcc.target/loongarch/div-4.c: New test.
Diffstat (limited to 'libcpp')
0 files changed, 0 insertions, 0 deletions