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| author | Dennis Zhang <denzha01@e124712.cambridge.arm.com> | 2020-11-03 16:56:02 +0000 |
|---|---|---|
| committer | Dennis Zhang <denzha01@e124712.cambridge.arm.com> | 2020-11-03 16:56:02 +0000 |
| commit | 3553c658533e430b232997bdfd97faf6606fb102 (patch) | |
| tree | 366d78e9ad002496d287d08adc51592a9e584d0a /libcpp | |
| parent | cee45e49126d18fe2dc8efc83c190662cd41914d (diff) | |
| download | gcc-3553c658533e430b232997bdfd97faf6606fb102.zip gcc-3553c658533e430b232997bdfd97faf6606fb102.tar.gz gcc-3553c658533e430b232997bdfd97faf6606fb102.tar.bz2 | |
aarch64: intrinsics extract half of bf16 vector
This patch implements ACLE intrinsics vget_low_bf16 and vget_high_bf16
to extract lower or higher half from a bfloat16x8 vector. The
vget_high_bf16 is done by 'dup' instruction. The vget_low_bf16 is just
to return the lower half of a vector register. Tests include both big-
and little-endian cases.
gcc/ChangeLog:
2020-11-03 Dennis Zhang <dennis.zhang@arm.com>
* config/aarch64/aarch64-simd-builtins.def (vget_lo_half): New entry.
(vget_hi_half): Likewise.
* config/aarch64/aarch64-simd.md (aarch64_vget_lo_halfv8bf): New entry.
(aarch64_vget_hi_halfv8bf): Likewise.
* config/aarch64/arm_neon.h (vget_low_bf16): New intrinsic.
(vget_high_bf16): Likewise.
gcc/testsuite/ChangeLog
* gcc.target/aarch64/advsimd-intrinsics/bf16_get.c: New test.
* gcc.target/aarch64/advsimd-intrinsics/bf16_get-be.c: New test.
Diffstat (limited to 'libcpp')
0 files changed, 0 insertions, 0 deletions