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| author | Tamar Christina <tamar.christina@arm.com> | 2023-11-09 14:03:04 +0000 |
|---|---|---|
| committer | Tamar Christina <tamar.christina@arm.com> | 2023-11-09 14:07:43 +0000 |
| commit | 830460d67a10549939602ba323ea3fa65fb7de20 (patch) | |
| tree | eba4582fa9e96c6a5adcc3683a7afa8a5ae8873a /libcpp/line-map.cc | |
| parent | 2ea13fb9c0b56e9b8c0425d101cf81437a5200cf (diff) | |
| download | gcc-830460d67a10549939602ba323ea3fa65fb7de20.zip gcc-830460d67a10549939602ba323ea3fa65fb7de20.tar.gz gcc-830460d67a10549939602ba323ea3fa65fb7de20.tar.bz2 | |
AArch64: Add movi for 0 moves for scalar types [PR109154]
Following the Neoverse N/V and Cortex-A optimization guides SIMD 0 immediates
should be created with a movi of 0.
At the moment we generate an `fmov .., xzr` which is slower and requires a
GP -> FP transfer.
gcc/ChangeLog:
PR tree-optimization/109154
* config/aarch64/aarch64.md (*mov<mode>_aarch64, *movsi_aarch64,
*movdi_aarch64): Add new w -> Z case.
* config/aarch64/iterators.md (Vbtype): Add QI and HI.
gcc/testsuite/ChangeLog:
PR tree-optimization/109154
* gcc.target/aarch64/fneg-abs_2.c: Updated.
* gcc.target/aarch64/fneg-abs_4.c: Updated.
* gcc.target/aarch64/dbl_mov_immediate_1.c: Updated.
Diffstat (limited to 'libcpp/line-map.cc')
0 files changed, 0 insertions, 0 deletions