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| author | Mihail Ionescu <mihail.ionescu@arm.com> | 2020-01-17 18:14:54 +0000 |
|---|---|---|
| committer | Mihail Ionescu <mihail.ionescu@arm.com> | 2020-01-17 18:50:38 +0000 |
| commit | a968a40c4ee34ff4ca69018c7ad91002b347e3df (patch) | |
| tree | ef6476f8d856e0398616c1ebaa92c4ef85d478f3 /libcpp/generated_cpp_wcwidth.h | |
| parent | 60d616b1f6deffcc57a4114f1a31559a17a3923c (diff) | |
| download | gcc-a968a40c4ee34ff4ca69018c7ad91002b347e3df.zip gcc-a968a40c4ee34ff4ca69018c7ad91002b347e3df.tar.gz gcc-a968a40c4ee34ff4ca69018c7ad91002b347e3df.tar.bz2 | |
[GCC/ARM, 2/2] Add support for ASRL(imm), LSLL(imm) and LSRL(imm) instructions for Armv8.1-M Mainline
This patch is adding the following instructions:
ASRL (imm)
LSLL (imm)
LSRL (imm)
*** gcc/ChangeLog ***
2020-01-17 Mihail-Calin Ionescu <mihail.ionescu@arm.com>
Sudakshina Das <sudi.das@arm.com>
* config/arm/arm.md (ashldi3): Generate thumb2_lsll for both reg
and valid immediate.
(ashrdi3): Generate thumb2_asrl for both reg and valid immediate.
(lshrdi3): Generate thumb2_lsrl for valid immediates.
* config/arm/constraints.md (Pg): New.
* config/arm/predicates.md (long_shift_imm): New.
(arm_reg_or_long_shift_imm): Likewise.
* config/arm/thumb2.md (thumb2_asrl): New immediate alternative.
(thumb2_lsll): Likewise.
(thumb2_lsrl): New.
*** gcc/testsuite/ChangeLog ***
2020-01-17 Mihail-Calin Ionescu <mihail.ionescu@arm.com>
Sudakshina Das <sudi.das@arm.com>
* gcc.target/arm/armv8_1m-shift-imm_1.c: New test.
Diffstat (limited to 'libcpp/generated_cpp_wcwidth.h')
0 files changed, 0 insertions, 0 deletions