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authorAndre Vieira <andre.simoesdiasvieira@arm.com>2023-02-02 10:01:13 +0000
committerAndre Vieira <andre.simoesdiasvieira@arm.com>2023-02-02 10:01:13 +0000
commitd45ec8a732f449647afa89e46b80a4e0614ec28d (patch)
tree24b143aded8b691c315f63eb0cf5cf9d7b63e551 /include
parent75b58e77706e8b5057770f040005950940a9a0f5 (diff)
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arm: Remove unnecessary zero-extending of MVE predicates before use [PR 107674]
This patch teaches GCC that zero-extending a MVE predicate from 16-bits to 32-bits and then only using 16-bits is a no-op. It does so in two steps: - it lets gcc know that it can access any MVE predicate mode using any other MVE predicate mode without needing to copy it, using the TARGET_MODES_TIEABLE_P hook, - it teaches simplify_subreg to optimize a subreg with a vector outermode, by replacing this outermode with a same-sized integer mode and trying the avalailable optimizations, then if successful it surrounds the result with a subreg casting it back to the original vector outermode. gcc/ChangeLog: PR target/107674 * config/arm/arm.cc (arm_hard_regno_mode_ok): Use new MACRO. (arm_modes_tieable_p): Make MVE predicate modes tieable. * config/arm/arm.h (VALID_MVE_PRED_MODE): New define. * simplify-rtx.cc (simplify_context::simplify_subreg): Teach simplify_subreg to simplify subregs where the outermode is not scalar. gcc/testsuite/ChangeLog: * gcc.target/arm/mve/mve_vpt.c: Change to remove unecessary zero-extend.
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