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authorBob Wilson <bob.wilson@acm.org>2008-11-19 18:26:00 +0000
committerBob Wilson <bwilson@gcc.gnu.org>2008-11-19 18:26:00 +0000
commit2ad646bdcafe10bc1da16edca1e5961925e10417 (patch)
treee37721b4936a1f2dce8afcb82836ae59417f01db /include/xtensa-config.h
parent9866586167b7591ff1bbfe59ccdeba1dad796246 (diff)
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include/
* xtensa-config.h (XCHAL_HAVE_MUL16, XCHAL_HAVE_MUL32, XCHAL_HAVE_DIV32) (XCHAL_HAVE_MINMAX, XCHAL_HAVE_SEXT, XCHAL_HAVE_THREADPTR) (XCHAL_HAVE_RELEASE_SYNC, XCHAL_HAVE_S32C1I): Change to 1. (XCHAL_NUM_AREGS): Change to 32. (XCHAL_ICACHE_SIZE, XCHAL_DCACHE_SIZE): Change to 16K. (XCHAL_ICACHE_LINESIZE, XCHAL_DCACHE_LINESIZE): Change to 32. (XCHAL_ICACHE_LINEWIDTH, XCHAL_DCACHE_LINEWIDTH): Change to 5. (XCHAL_DCACHE_IS_WRITEBACK): Change to 1. (XCHAL_DEBUGLEVEL): Change to 6. From-SVN: r142012
Diffstat (limited to 'include/xtensa-config.h')
-rw-r--r--include/xtensa-config.h36
1 files changed, 18 insertions, 18 deletions
diff --git a/include/xtensa-config.h b/include/xtensa-config.h
index 768ff90..bc99815 100644
--- a/include/xtensa-config.h
+++ b/include/xtensa-config.h
@@ -1,5 +1,5 @@
/* Xtensa configuration settings.
- Copyright (C) 2001, 2002, 2003, 2004, 2005, 2006, 2007
+ Copyright (C) 2001, 2002, 2003, 2004, 2005, 2006, 2007, 2008
Free Software Foundation, Inc.
Contributed by Bob Wilson (bwilson@tensilica.com) at Tensilica.
@@ -50,37 +50,37 @@
#define XCHAL_HAVE_MAC16 0
#undef XCHAL_HAVE_MUL16
-#define XCHAL_HAVE_MUL16 0
+#define XCHAL_HAVE_MUL16 1
#undef XCHAL_HAVE_MUL32
-#define XCHAL_HAVE_MUL32 0
+#define XCHAL_HAVE_MUL32 1
#undef XCHAL_HAVE_MUL32_HIGH
#define XCHAL_HAVE_MUL32_HIGH 0
#undef XCHAL_HAVE_DIV32
-#define XCHAL_HAVE_DIV32 0
+#define XCHAL_HAVE_DIV32 1
#undef XCHAL_HAVE_NSA
#define XCHAL_HAVE_NSA 1
#undef XCHAL_HAVE_MINMAX
-#define XCHAL_HAVE_MINMAX 0
+#define XCHAL_HAVE_MINMAX 1
#undef XCHAL_HAVE_SEXT
-#define XCHAL_HAVE_SEXT 0
+#define XCHAL_HAVE_SEXT 1
#undef XCHAL_HAVE_LOOPS
#define XCHAL_HAVE_LOOPS 1
#undef XCHAL_HAVE_THREADPTR
-#define XCHAL_HAVE_THREADPTR 0
+#define XCHAL_HAVE_THREADPTR 1
#undef XCHAL_HAVE_RELEASE_SYNC
-#define XCHAL_HAVE_RELEASE_SYNC 0
+#define XCHAL_HAVE_RELEASE_SYNC 1
#undef XCHAL_HAVE_S32C1I
-#define XCHAL_HAVE_S32C1I 0
+#define XCHAL_HAVE_S32C1I 1
#undef XCHAL_HAVE_BOOLEANS
#define XCHAL_HAVE_BOOLEANS 0
@@ -104,7 +104,7 @@
#define XCHAL_HAVE_WINDOWED 1
#undef XCHAL_NUM_AREGS
-#define XCHAL_NUM_AREGS 64
+#define XCHAL_NUM_AREGS 32
#undef XCHAL_HAVE_WIDE_BRANCHES
#define XCHAL_HAVE_WIDE_BRANCHES 0
@@ -114,25 +114,25 @@
#undef XCHAL_ICACHE_SIZE
-#define XCHAL_ICACHE_SIZE 8192
+#define XCHAL_ICACHE_SIZE 16384
#undef XCHAL_DCACHE_SIZE
-#define XCHAL_DCACHE_SIZE 8192
+#define XCHAL_DCACHE_SIZE 16384
#undef XCHAL_ICACHE_LINESIZE
-#define XCHAL_ICACHE_LINESIZE 16
+#define XCHAL_ICACHE_LINESIZE 32
#undef XCHAL_DCACHE_LINESIZE
-#define XCHAL_DCACHE_LINESIZE 16
+#define XCHAL_DCACHE_LINESIZE 32
#undef XCHAL_ICACHE_LINEWIDTH
-#define XCHAL_ICACHE_LINEWIDTH 4
+#define XCHAL_ICACHE_LINEWIDTH 5
#undef XCHAL_DCACHE_LINEWIDTH
-#define XCHAL_DCACHE_LINEWIDTH 4
+#define XCHAL_DCACHE_LINEWIDTH 5
#undef XCHAL_DCACHE_IS_WRITEBACK
-#define XCHAL_DCACHE_IS_WRITEBACK 0
+#define XCHAL_DCACHE_IS_WRITEBACK 1
#undef XCHAL_HAVE_MMU
@@ -152,7 +152,7 @@
#define XCHAL_NUM_DBREAK 2
#undef XCHAL_DEBUGLEVEL
-#define XCHAL_DEBUGLEVEL 4
+#define XCHAL_DEBUGLEVEL 6
#undef XCHAL_MAX_INSTRUCTION_SIZE