RISC-V: Fix RVV binary auto-vectorizaiton test fails

In rv32:
FAIL: gcc.target/riscv/rvv/autovec/vmax-rv64gcv.c -O3 -ftree-vectorize
(test for excess errors)
FAIL: gcc.target/riscv/rvv/autovec/vmin-run.c -O3 -ftree-vectorize (test
for excess errors)
FAIL: gcc.target/riscv/rvv/autovec/vadd-rv64gcv.c -O3 -ftree-vectorize
(test for excess errors)
FAIL: gcc.target/riscv/rvv/autovec/vand-run.c -O3 -ftree-vectorize (test
for excess errors)
FAIL: gcc.target/riscv/rvv/autovec/vrem-run.c -O3 -ftree-vectorize (test
for excess errors)
FAIL: gcc.target/riscv/rvv/autovec/vmin-rv64gcv.c -O3 -ftree-vectorize
(test for excess errors)
FAIL: gcc.target/riscv/rvv/autovec/vmul-run.c -O3 -ftree-vectorize (test
for excess errors)
FAIL: gcc.target/riscv/rvv/autovec/shift-run.c -O3 -ftree-vectorize
(test for excess errors)
FAIL: gcc.target/riscv/rvv/autovec/vrem-rv64gcv.c -O3 -ftree-vectorize
(test for excess errors)
FAIL: gcc.target/riscv/rvv/autovec/vand-rv64gcv.c -O3 -ftree-vectorize
(test for excess errors)
FAIL: gcc.target/riscv/rvv/autovec/vdiv-run.c -O3 -ftree-vectorize (test
for excess errors)
FAIL: gcc.target/riscv/rvv/autovec/vmul-rv64gcv.c -O3 -ftree-vectorize
(test for excess errors)
FAIL: gcc.target/riscv/rvv/autovec/vor-run.c -O3 -ftree-vectorize (test
for excess errors)
FAIL: gcc.target/riscv/rvv/autovec/shift-rv64gcv.c -O3 -ftree-vectorize
(test for excess errors)
FAIL: gcc.target/riscv/rvv/autovec/shift-scalar-run.c -O3
-ftree-vectorize (test for excess errors)
FAIL: gcc.target/riscv/rvv/autovec/vdiv-rv64gcv.c -O3 -ftree-vectorize
(test for excess errors)
FAIL: gcc.target/riscv/rvv/autovec/vmax-run.c -O3 -ftree-vectorize (test
for excess errors)
FAIL: gcc.target/riscv/rvv/autovec/vor-rv64gcv.c -O3 -ftree-vectorize
(test for excess errors)

In rv64:
FAIL: gcc.target/riscv/rvv/autovec/vsub-rv64gcv.c -O3 -ftree-vectorize
(test for excess errors)

Signed-off-by: Juzhe Zhong <juzhe.zhong@rivai.ai>

gcc/testsuite/ChangeLog:

	* gcc.target/riscv/rvv/autovec/shift-run.c: Fix fail.
	* gcc.target/riscv/rvv/autovec/shift-rv64gcv.c: Ditto.
	* gcc.target/riscv/rvv/autovec/shift-scalar-run.c: Ditto.
	* gcc.target/riscv/rvv/autovec/shift-scalar-rv64gcv.c: Ditto.
	* gcc.target/riscv/rvv/autovec/vadd-rv64gcv.c: Ditto.
	* gcc.target/riscv/rvv/autovec/vand-run.c: Ditto.
	* gcc.target/riscv/rvv/autovec/vand-rv64gcv.c: Ditto.
	* gcc.target/riscv/rvv/autovec/vdiv-run.c: Ditto.
	* gcc.target/riscv/rvv/autovec/vdiv-rv64gcv.c: Ditto.
	* gcc.target/riscv/rvv/autovec/vmax-run.c: Ditto.
	* gcc.target/riscv/rvv/autovec/vmax-rv64gcv.c: Ditto.
	* gcc.target/riscv/rvv/autovec/vmin-run.c: Ditto.
	* gcc.target/riscv/rvv/autovec/vmin-rv64gcv.c: Ditto.
	* gcc.target/riscv/rvv/autovec/vmul-run.c: Ditto.
	* gcc.target/riscv/rvv/autovec/vmul-rv64gcv.c: Ditto.
	* gcc.target/riscv/rvv/autovec/vor-run.c: Ditto.
	* gcc.target/riscv/rvv/autovec/vor-rv64gcv.c: Ditto.
	* gcc.target/riscv/rvv/autovec/vrem-run.c: Ditto.
	* gcc.target/riscv/rvv/autovec/vrem-rv64gcv.c: Ditto.
	* gcc.target/riscv/rvv/autovec/vsub-rv64gcv.c: Ditto.
	* gcc.target/riscv/rvv/autovec/vxor-run.c: Ditto.
	* gcc.target/riscv/rvv/autovec/vxor-rv64gcv.c: Ditto.

22 files changed, 23 insertions, 23 deletions

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/shift-run.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/shift-run.c
index 67e9f8c..159478c 100644
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/shift-run.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/shift-run.c
@@ -1,5 +1,5 @@
 /* { dg-do run { target { riscv_vector } } } */
-/* { dg-additional-options "-std=c99 -fno-vect-cost-model -march=rv64gcv --param=riscv-autovec-preference=fixed-vlmax" } */
+/* { dg-additional-options "-std=c99 -fno-vect-cost-model --param=riscv-autovec-preference=fixed-vlmax" } */
 
 #include "shift-template.h"
 
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/shift-rv64gcv.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/shift-rv64gcv.c
index aba9c84..d9109fd 100644
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/shift-rv64gcv.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/shift-rv64gcv.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-additional-options "-std=c99 -fno-vect-cost-model -march=rv64gcv --param=riscv-autovec-preference=fixed-vlmax" } */
+/* { dg-additional-options "-std=c99 -fno-vect-cost-model -march=rv64gcv -mabi=lp64d --param=riscv-autovec-preference=fixed-vlmax" } */
 
 #include "shift-template.h"
 
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/shift-scalar-run.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/shift-scalar-run.c
index 1e80174..a8ecf97 100644
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/shift-scalar-run.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/shift-scalar-run.c
@@ -1,4 +1,4 @@
 /* { dg-do run { target { riscv_vector } } } */
-/* { dg-additional-options "-std=c99 -fno-vect-cost-model -march=rv64gcv --param=riscv-autovec-preference=fixed-vlmax" } */
+/* { dg-additional-options "-std=c99 -fno-vect-cost-model --param=riscv-autovec-preference=fixed-vlmax" } */
 
 #include "shift-scalar-template.h"
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/shift-scalar-rv64gcv.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/shift-scalar-rv64gcv.c
index aabd2e0..82a5fe2 100644
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/shift-scalar-rv64gcv.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/shift-scalar-rv64gcv.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-additional-options "-std=c99 -fno-vect-cost-model -march=rv64gcv --param=riscv-autovec-preference=fixed-vlmax" } */
+/* { dg-additional-options "-std=c99 -fno-vect-cost-model -march=rv64gcv -mabi=lp64d --param=riscv-autovec-preference=fixed-vlmax" } */
 
 #include "shift-scalar-template.h"
 
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vadd-rv64gcv.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vadd-rv64gcv.c
index d9ba5a3..64c2eee 100644
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vadd-rv64gcv.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vadd-rv64gcv.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-additional-options "-std=c99 -fno-vect-cost-model -march=rv64gcv --param=riscv-autovec-preference=fixed-vlmax" } */
+/* { dg-additional-options "-std=c99 -fno-vect-cost-model -march=rv64gcv -mabi=lp64d --param=riscv-autovec-preference=fixed-vlmax" } */
 
 #include "vadd-template.h"
 
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vand-run.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vand-run.c
index 1c7def5..c13755e 100644
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vand-run.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vand-run.c
@@ -1,5 +1,5 @@
 /* { dg-do run { target { riscv_vector } } } */
-/* { dg-additional-options "-std=c99 -fno-vect-cost-model -march=rv64gcv --param=riscv-autovec-preference=fixed-vlmax" } */
+/* { dg-additional-options "-std=c99 -fno-vect-cost-model --param=riscv-autovec-preference=fixed-vlmax" } */
 
 #include "vand-template.h"
 
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vand-rv64gcv.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vand-rv64gcv.c
index 3cd766b..67f37c1 100644
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vand-rv64gcv.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vand-rv64gcv.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-additional-options "-std=c99 -fno-vect-cost-model -march=rv64gcv --param=riscv-autovec-preference=fixed-vlmax" } */
+/* { dg-additional-options "-std=c99 -fno-vect-cost-model -march=rv64gcv -mabi=lp64d --param=riscv-autovec-preference=fixed-vlmax" } */
 
 #include "vand-template.h"
 
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vdiv-run.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vdiv-run.c
index c8f4ce8..aa9a3c5 100644
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vdiv-run.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vdiv-run.c
@@ -1,5 +1,5 @@
 /* { dg-do run { target { riscv_vector } } } */
-/* { dg-additional-options "-std=c99 -fno-vect-cost-model -march=rv64gcv --param=riscv-autovec-preference=fixed-vlmax" } */
+/* { dg-additional-options "-std=c99 -fno-vect-cost-model --param=riscv-autovec-preference=fixed-vlmax" } */
 
 #include "vdiv-template.h"
 
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vdiv-rv64gcv.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vdiv-rv64gcv.c
index 40fdfbd..7d9b75a 100644
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vdiv-rv64gcv.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vdiv-rv64gcv.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-additional-options "-std=c99 -fno-vect-cost-model -march=rv64gcv --param=riscv-autovec-preference=fixed-vlmax" } */
+/* { dg-additional-options "-std=c99 -fno-vect-cost-model -march=rv64gcv -mabi=lp64d --param=riscv-autovec-preference=fixed-vlmax" } */
 
 #include "vdiv-template.h"
 
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vmax-run.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vmax-run.c
index 90e5c97..cf184e2 100644
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vmax-run.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vmax-run.c
@@ -1,5 +1,5 @@
 /* { dg-do run { target { riscv_vector } } } */
-/* { dg-additional-options "-std=c99 -fno-vect-cost-model -march=rv64gcv --param=riscv-autovec-preference=fixed-vlmax" } */
+/* { dg-additional-options "-std=c99 -fno-vect-cost-model --param=riscv-autovec-preference=fixed-vlmax" } */
 
 #include "vmax-template.h"
 
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vmax-rv64gcv.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vmax-rv64gcv.c
index 0349630..9bbaf76 100644
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vmax-rv64gcv.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vmax-rv64gcv.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-additional-options "-std=c99 -fno-vect-cost-model -march=rv64gcv --param=riscv-autovec-preference=fixed-vlmax" } */
+/* { dg-additional-options "-std=c99 -fno-vect-cost-model -march=rv64gcv -mabi=lp64d --param=riscv-autovec-preference=fixed-vlmax" } */
 
 #include "vmax-template.h"
 
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vmin-run.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vmin-run.c
index 34f9348..b461f8b 100644
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vmin-run.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vmin-run.c
@@ -1,5 +1,5 @@
 /* { dg-do run { target { riscv_vector } } } */
-/* { dg-additional-options "-std=c99 -fno-vect-cost-model -march=rv64gcv --param=riscv-autovec-preference=fixed-vlmax" } */
+/* { dg-additional-options "-std=c99 -fno-vect-cost-model --param=riscv-autovec-preference=fixed-vlmax" } */
 
 #include "vmin-template.h"
 
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vmin-rv64gcv.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vmin-rv64gcv.c
index ff1d0bb..07278b2 100644
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vmin-rv64gcv.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vmin-rv64gcv.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-additional-options "-std=c99 -fno-vect-cost-model -march=rv64gcv --param=riscv-autovec-preference=fixed-vlmax" } */
+/* { dg-additional-options "-std=c99 -fno-vect-cost-model -march=rv64gcv -mabi=lp64d --param=riscv-autovec-preference=fixed-vlmax" } */
 
 #include "vmin-template.h"
 
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vmul-run.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vmul-run.c
index 19e38ca..e8441c0 100644
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vmul-run.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vmul-run.c
@@ -1,5 +1,5 @@
 /* { dg-do run { target { riscv_vector } } } */
-/* { dg-additional-options "-std=c99 -fno-vect-cost-model -march=rv64gcv --param=riscv-autovec-preference=fixed-vlmax" } */
+/* { dg-additional-options "-std=c99 -fno-vect-cost-model --param=riscv-autovec-preference=fixed-vlmax" } */
 
 #include "vmul-template.h"
 
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vmul-rv64gcv.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vmul-rv64gcv.c
index a21bae4..f436b8a 100644
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vmul-rv64gcv.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vmul-rv64gcv.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-additional-options "-std=c99 -fno-vect-cost-model -march=rv64gcv --param=riscv-autovec-preference=fixed-vlmax" } */
+/* { dg-additional-options "-std=c99 -fno-vect-cost-model -march=rv64gcv -mabi=lp64d --param=riscv-autovec-preference=fixed-vlmax" } */
 
 #include "vmul-template.h"
 
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vor-run.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vor-run.c
index e5eb1c4..5401e8d 100644
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vor-run.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vor-run.c
@@ -1,5 +1,5 @@
 /* { dg-do run { target { riscv_vector } } } */
-/* { dg-additional-options "-std=c99 -fno-vect-cost-model -march=rv64gcv --param=riscv-autovec-preference=fixed-vlmax" } */
+/* { dg-additional-options "-std=c99 -fno-vect-cost-model --param=riscv-autovec-preference=fixed-vlmax" } */
 
 #include "vor-template.h"
 
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vor-rv64gcv.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vor-rv64gcv.c
index d364871..ae115a2 100644
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vor-rv64gcv.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vor-rv64gcv.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-additional-options "-std=c99 -fno-vect-cost-model -march=rv64gcv --param=riscv-autovec-preference=fixed-vlmax" } */
+/* { dg-additional-options "-std=c99 -fno-vect-cost-model -march=rv64gcv -mabi=lp64d --param=riscv-autovec-preference=fixed-vlmax" } */
 
 #include "vor-template.h"
 
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vrem-run.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vrem-run.c
index db3bee3..4a4c064 100644
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vrem-run.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vrem-run.c
@@ -1,5 +1,5 @@
 /* { dg-do run { target { riscv_vector } } } */
-/* { dg-additional-options "-std=c99 -fno-vect-cost-model -march=rv64gcv --param=riscv-autovec-preference=fixed-vlmax" } */
+/* { dg-additional-options "-std=c99 -fno-vect-cost-model --param=riscv-autovec-preference=fixed-vlmax" } */
 
 #include "vrem-template.h"
 
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vrem-rv64gcv.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vrem-rv64gcv.c
index 68dbdcf..5b6961d 100644
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vrem-rv64gcv.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vrem-rv64gcv.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-additional-options "-std=c99 -fno-vect-cost-model -march=rv64gcv --param=riscv-autovec-preference=fixed-vlmax" } */
+/* { dg-additional-options "-std=c99 -fno-vect-cost-model -march=rv64gcv -mabi=lp64d --param=riscv-autovec-preference=fixed-vlmax" } */
 
 #include "vrem-template.h"
 
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vsub-rv64gcv.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vsub-rv64gcv.c
index 26867a0..f7a2691 100644
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vsub-rv64gcv.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vsub-rv64gcv.c
@@ -1,5 +1,5 @@
-/* { dg-do run { target { riscv_vector } } } */
-/* { dg-additional-options "-std=c99 -fno-vect-cost-model -march=rv64gcv --param=riscv-autovec-preference=fixed-vlmax" } */
+/* { dg-do compile } */
+/* { dg-additional-options "-std=c99 -fno-vect-cost-model -march=rv64gcv -mabi=lp64d --param=riscv-autovec-preference=fixed-vlmax" } */
 
 #include "vsub-template.h"
 
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vxor-run.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vxor-run.c
index 68b9648..ab0975a 100644
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vxor-run.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vxor-run.c
@@ -1,5 +1,5 @@
 /* { dg-do run { target { riscv_vector } } } */
-/* { dg-additional-options "-std=c99 -fno-vect-cost-model -march=rv64gcv --param=riscv-autovec-preference=fixed-vlmax" } */
+/* { dg-additional-options "-std=c99 -fno-vect-cost-model --param=riscv-autovec-preference=fixed-vlmax" } */
 
 #include "vxor-template.h"
 
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vxor-rv64gcv.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vxor-rv64gcv.c
index 3e5885e..9729ad1 100644
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vxor-rv64gcv.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vxor-rv64gcv.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-additional-options "-std=c99 -fno-vect-cost-model -march=rv64gcv --param=riscv-autovec-preference=fixed-vlmax" } */
+/* { dg-additional-options "-std=c99 -fno-vect-cost-model -march=rv64gcv -mabi=lp64d --param=riscv-autovec-preference=fixed-vlmax" } */
 
 #include "vxor-template.h"