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authorMartin Liska <mliska@suse.cz>2021-04-06 14:18:49 +0200
committerMartin Liska <mliska@suse.cz>2021-04-09 13:47:27 +0200
commitbdce43ce5a584ab329f94aef39260dd39ed530eb (patch)
treee9625eed61de0cad6eca643bf4d485f208ff2333 /gcc
parent6fd1271e71b16b535d0016229dff6e89a3deb280 (diff)
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i386: move non-target attributes out of target section
gcc/ChangeLog: * doc/extend.texi: Move non-target attributes on the top level.
Diffstat (limited to 'gcc')
-rw-r--r--gcc/doc/extend.texi58
1 files changed, 29 insertions, 29 deletions
diff --git a/gcc/doc/extend.texi b/gcc/doc/extend.texi
index 29ef0d6..849c880 100644
--- a/gcc/doc/extend.texi
+++ b/gcc/doc/extend.texi
@@ -6924,6 +6924,35 @@ Specify which floating-point unit to use. You must specify the
@code{target("fpmath=sse+387")} because the comma would separate
different options.
+@item prefer-vector-width=@var{OPT}
+@cindex @code{prefer-vector-width} function attribute, x86
+On x86 targets, the @code{prefer-vector-width} attribute informs the
+compiler to use @var{OPT}-bit vector width in instructions
+instead of the default on the selected platform.
+
+Valid @var{OPT} values are:
+
+@table @samp
+@item none
+No extra limitations applied to GCC other than defined by the selected platform.
+
+@item 128
+Prefer 128-bit vector width for instructions.
+
+@item 256
+Prefer 256-bit vector width for instructions.
+
+@item 512
+Prefer 512-bit vector width for instructions.
+@end table
+
+On the x86, the inliner does not inline a
+function that has different target options than the caller, unless the
+callee has a subset of the target options of the caller. For example
+a function declared with @code{target("sse3")} can inline a function
+with @code{target("sse2")}, since @code{-msse3} implies @code{-msse2}.
+@end table
+
@item indirect_branch("@var{choice}")
@cindex @code{indirect_branch} function attribute, x86
On x86 targets, the @code{indirect_branch} attribute causes the compiler
@@ -7027,35 +7056,6 @@ On x86 targets, the @code{fentry_section} attribute sets the name
of the section to record function entry instrumentation calls in when
enabled with @option{-pg -mrecord-mcount}
-@item prefer-vector-width=@var{OPT}
-@cindex @code{prefer-vector-width} function attribute, x86
-On x86 targets, the @code{prefer-vector-width} attribute informs the
-compiler to use @var{OPT}-bit vector width in instructions
-instead of the default on the selected platform.
-
-Valid @var{OPT} values are:
-
-@table @samp
-@item none
-No extra limitations applied to GCC other than defined by the selected platform.
-
-@item 128
-Prefer 128-bit vector width for instructions.
-
-@item 256
-Prefer 256-bit vector width for instructions.
-
-@item 512
-Prefer 512-bit vector width for instructions.
-@end table
-
-@end table
-
-On the x86, the inliner does not inline a
-function that has different target options than the caller, unless the
-callee has a subset of the target options of the caller. For example
-a function declared with @code{target("sse3")} can inline a function
-with @code{target("sse2")}, since @code{-msse3} implies @code{-msse2}.
@end table
@node Xstormy16 Function Attributes