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author | Will Schmidt <will_schmidt@vnet.ibm.com> | 2020-02-07 10:36:05 -0600 |
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committer | Will Schmidt <will_schmidt@vnet.ibm.com> | 2020-02-07 10:36:05 -0600 |
commit | 6fa476f6e1a07cf7fafec256ae52cdcb948b133d (patch) | |
tree | 0506e3836fb053acd471b4ef3c9f4ff3fc271317 /gcc | |
parent | 572992c8920d5339a3ac28d442c436d6daa0bfae (diff) | |
download | gcc-6fa476f6e1a07cf7fafec256ae52cdcb948b133d.zip gcc-6fa476f6e1a07cf7fafec256ae52cdcb948b133d.tar.gz gcc-6fa476f6e1a07cf7fafec256ae52cdcb948b133d.tar.bz2 |
[PATCH] add -mvsx to pr92923-1.c test requiring vsx
[testsuite]
* gcc.target/powerpc/pr92923-1.c: Add -mvsx.
Diffstat (limited to 'gcc')
-rw-r--r-- | gcc/testsuite/ChangeLog | 4 | ||||
-rw-r--r-- | gcc/testsuite/gcc.target/powerpc/pr92923-1.c | 4 |
2 files changed, 6 insertions, 2 deletions
diff --git a/gcc/testsuite/ChangeLog b/gcc/testsuite/ChangeLog index 7ec36cc..4a4550b 100644 --- a/gcc/testsuite/ChangeLog +++ b/gcc/testsuite/ChangeLog @@ -1,3 +1,7 @@ +2020-02-07 Will Schmidt <will_schmidt@vnet.ibm.com> + + * testsuite/gcc.target/powerpc/pr92923-1.c: Add -mvsx. + 2020-02-07 Dennis Zhang <dennis.zhang@arm.com> * gcc.target/aarch64/simd/vmmla.c: New test. diff --git a/gcc/testsuite/gcc.target/powerpc/pr92923-1.c b/gcc/testsuite/gcc.target/powerpc/pr92923-1.c index f901244..262f1a1 100644 --- a/gcc/testsuite/gcc.target/powerpc/pr92923-1.c +++ b/gcc/testsuite/gcc.target/powerpc/pr92923-1.c @@ -1,6 +1,6 @@ /* { dg-do compile } */ -/* { dg-require-effective-target powerpc_altivec_ok } */ -/* { dg-options "-maltivec -O2 -fdump-tree-gimple" } */ +/* { dg-require-effective-target powerpc_vsx_ok } */ +/* { dg-options "-mvsx -O2 -fdump-tree-gimple" } */ /* Verify that overloaded built-ins for "and", "andc", "nor", "or" and "xor" do not produce VIEW_CONVERT_EXPR operations on their operands. Like so: |