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| author | Juergen Christ <jchrist@linux.ibm.com> | 2023-07-07 16:52:22 +0200 |
|---|---|---|
| committer | Andreas Krebbel <krebbel@linux.ibm.com> | 2023-07-07 16:54:19 +0200 |
| commit | 6f428f1a88557f8b5df653ece92ac3e7b5baf6c6 (patch) | |
| tree | 3770e8197af8dba5e37dc551e8a8aabf521b8ede /gcc | |
| parent | 1f7e5a7b91862b999aab88ee0319052aaf00f0f1 (diff) | |
| download | gcc-6f428f1a88557f8b5df653ece92ac3e7b5baf6c6.zip gcc-6f428f1a88557f8b5df653ece92ac3e7b5baf6c6.tar.gz gcc-6f428f1a88557f8b5df653ece92ac3e7b5baf6c6.tar.bz2 | |
IBM Z: Fix vec_init default expander
Do not reinitialize vector lanes to zero since they are already
initialized to zero.
gcc/ChangeLog:
* config/s390/s390.cc (vec_init): Fix default case
gcc/testsuite/ChangeLog:
* gcc.target/s390/vector/vec-init-3.c: New test.
Diffstat (limited to 'gcc')
| -rw-r--r-- | gcc/config/s390/s390.cc | 11 | ||||
| -rw-r--r-- | gcc/testsuite/gcc.target/s390/vector/vec-init-3.c | 17 |
2 files changed, 23 insertions, 5 deletions
diff --git a/gcc/config/s390/s390.cc b/gcc/config/s390/s390.cc index d9f10542..13970ed 100644 --- a/gcc/config/s390/s390.cc +++ b/gcc/config/s390/s390.cc @@ -7381,11 +7381,12 @@ s390_expand_vec_init (rtx target, rtx vals) if (!general_operand (elem, GET_MODE (elem))) elem = force_reg (inner_mode, elem); - emit_insn (gen_rtx_SET (target, - gen_rtx_UNSPEC (mode, - gen_rtvec (3, elem, - GEN_INT (i), target), - UNSPEC_VEC_SET))); + if (elem != const0_rtx) + emit_insn (gen_rtx_SET (target, + gen_rtx_UNSPEC (mode, + gen_rtvec (3, elem, + GEN_INT (i), target), + UNSPEC_VEC_SET))); } } diff --git a/gcc/testsuite/gcc.target/s390/vector/vec-init-3.c b/gcc/testsuite/gcc.target/s390/vector/vec-init-3.c new file mode 100644 index 0000000..12008a9 --- /dev/null +++ b/gcc/testsuite/gcc.target/s390/vector/vec-init-3.c @@ -0,0 +1,17 @@ +/* Check that the default case of the vec_init expander does its job. */ + +/* { dg-do compile } */ +/* { dg-options "-O3 -mzarch -march=z13" } */ + +typedef __attribute__((vector_size(16))) signed int v4si; + +extern v4si G; + +v4si +n (signed int a) +{ + return G == (v4si){ a }; +} +/* { dg-final { scan-assembler-times "vzero" 1 } } */ +/* { dg-final { scan-assembler-times "vlvgf\t" 1 } } */ +/* { dg-final { scan-assembler-not "vleif\t" } } */ |