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authorRichard Henderson <rth@gcc.gnu.org>1999-01-27 09:54:45 -0800
committerRichard Henderson <rth@gcc.gnu.org>1999-01-27 09:54:45 -0800
commit39157bcc1d86ed2eaea0d5cf5bfb937fb0190fe8 (patch)
treee7055097603d36c10c02fd12030b1bf24eb9ff7f /gcc
parent3ec2b59097937f6c218fa04101ba7b649ddf15b5 (diff)
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Move `normal_memory_operand' from gcc2 merge into the operand
predicates section of the file. From-SVN: r24890
Diffstat (limited to 'gcc')
-rw-r--r--gcc/config/alpha/alpha.c22
1 files changed, 11 insertions, 11 deletions
diff --git a/gcc/config/alpha/alpha.c b/gcc/config/alpha/alpha.c
index 8370329..7a05701 100644
--- a/gcc/config/alpha/alpha.c
+++ b/gcc/config/alpha/alpha.c
@@ -848,17 +848,6 @@ reg_not_elim_operand (op, mode)
return register_operand (op, mode);
}
-
-/* Return 1 if this function can directly return via $26. */
-
-int
-direct_return ()
-{
- return (! TARGET_OPEN_VMS && reload_completed && alpha_sa_size () == 0
- && get_frame_size () == 0
- && current_function_outgoing_args_size == 0
- && current_function_pretend_args_size == 0);
-}
/* Return 1 is OP is a memory location that is not an reference (using
an AND) to an unaligned location. Take into account what reload
@@ -882,6 +871,17 @@ normal_memory_operand (op, mode)
return GET_CODE (op) == MEM && GET_CODE (XEXP (op, 0)) != AND;
}
+
+/* Return 1 if this function can directly return via $26. */
+
+int
+direct_return ()
+{
+ return (! TARGET_OPEN_VMS && reload_completed && alpha_sa_size () == 0
+ && get_frame_size () == 0
+ && current_function_outgoing_args_size == 0
+ && current_function_pretend_args_size == 0);
+}
/* REF is an alignable memory location. Place an aligned SImode
reference into *PALIGNED_MEM and the number of bits to shift into