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authorAndre Vieira <avieira@gcc.gnu.org>2018-05-30 16:04:03 +0000
committerAndre Vieira <avieira@gcc.gnu.org>2018-05-30 16:04:03 +0000
commit04b21a0a1bee5c2ec17377e2486cfcfd50dd811f (patch)
tree0cc93bb6794ffc60acd41de91dc11b24fa3ba7d6 /gcc
parent0c8e76210a1b7272b468691312f4e47028fd610d (diff)
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Fixing ChangeLog entry for earlier commit.
From-SVN: r260958
Diffstat (limited to 'gcc')
-rw-r--r--gcc/ChangeLog6
-rw-r--r--gcc/testsuite/ChangeLog5
2 files changed, 11 insertions, 0 deletions
diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index ff61ca5..68ed2e0 100644
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,3 +1,9 @@
+2018-05-30 Andre Vieira <andre.simoesdiasvieira@arm.com>
+
+ Revert:
+ * config/aarch64/predicates.md (aarch64_mem_pair_lanes_operand): Make
+ address check not strict.
+
2018-05-30 Richard Biener <rguenther@suse.de>
PR tree-optimization/85964
diff --git a/gcc/testsuite/ChangeLog b/gcc/testsuite/ChangeLog
index 158b880..ae89ac8 100644
--- a/gcc/testsuite/ChangeLog
+++ b/gcc/testsuite/ChangeLog
@@ -1,3 +1,8 @@
+2018-05-30 Andre Vieira <andre.simoesdiasvieira@arm.com>
+
+ Revert:
+ * gcc/target/aarch64/store_v2vec_lanes.c: Add extra tests.
+
2017-05-30 Jackson Woodruff <jackson.woodruff@arm.com>
* gcc.target/aarch64/simd/ldp_stp_9: New.