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| author | John David Anglin <dave.anglin@nrc-cnrc.gc.ca> | 2004-01-22 17:51:25 +0000 |
|---|---|---|
| committer | John David Anglin <danglin@gcc.gnu.org> | 2004-01-22 17:51:25 +0000 |
| commit | 7bff636b072cb0d8c6efde03593cdfb289d99c85 (patch) | |
| tree | cbb6fbc874f8d2a155f0788436b7a2595c687d24 /gcc | |
| parent | 980e61bb2ed877d8265eca526ebb0cb33dc99ab6 (diff) | |
| download | gcc-7bff636b072cb0d8c6efde03593cdfb289d99c85.zip gcc-7bff636b072cb0d8c6efde03593cdfb289d99c85.tar.gz gcc-7bff636b072cb0d8c6efde03593cdfb289d99c85.tar.bz2 | |
re PR target/13713 (gnat1 segmentation fault in stage 3 on hppa-linux)
PR target/13713
PR target/13324
* pa.md (movstrsi_prereload, movstrsi_postreload, movstrdi_prereload,
movstrdi_postreload, clrstrsi_prereload, clrstrsi_postreload,
clrstrdi_prereload, clrstrdi_postreload): Fix constraints.
From-SVN: r76365
Diffstat (limited to 'gcc')
| -rw-r--r-- | gcc/ChangeLog | 8 | ||||
| -rw-r--r-- | gcc/config/pa/pa.md | 28 |
2 files changed, 22 insertions, 14 deletions
diff --git a/gcc/ChangeLog b/gcc/ChangeLog index 57bb863..69346c6 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,3 +1,11 @@ +2004-01-22 John David Anglin <dave.anglin@nrc-cnrc.gc.ca> + + PR target/13713 + PR target/13324 + * pa.md (movstrsi_prereload, movstrsi_postreload, movstrdi_prereload, + movstrdi_postreload, clrstrsi_prereload, clrstrsi_postreload, + clrstrdi_prereload, clrstrdi_postreload): Fix constraints. + 2004-01-22 Daniel Jacobowitz <drow@mvista.com> * config/arm/arm.c: Include "debug.h". diff --git a/gcc/config/pa/pa.md b/gcc/config/pa/pa.md index 4530d427..9d06f34 100644 --- a/gcc/config/pa/pa.md +++ b/gcc/config/pa/pa.md @@ -3194,7 +3194,7 @@ (define_insn "movstrsi_prereload" [(set (mem:BLK (match_operand:SI 0 "register_operand" "r,r")) (mem:BLK (match_operand:SI 1 "register_operand" "r,r"))) - (clobber (match_operand:SI 2 "register_operand" "=r,r")) ;loop cnt/tmp + (clobber (match_operand:SI 2 "register_operand" "=&r,&r")) ;loop cnt/tmp (clobber (match_operand:SI 3 "register_operand" "=&r,&r")) ;item tmp1 (clobber (match_operand:SI 6 "register_operand" "=&r,&r")) ;item tmp2 (clobber (match_operand:SI 7 "register_operand" "=&r,&r")) ;item tmp3 @@ -3263,9 +3263,9 @@ }") (define_insn "movstrsi_postreload" - [(set (mem:BLK (match_operand:SI 0 "register_operand" "r,r")) - (mem:BLK (match_operand:SI 1 "register_operand" "r,r"))) - (clobber (match_operand:SI 2 "register_operand" "=r,r")) ;loop cnt/tmp + [(set (mem:BLK (match_operand:SI 0 "register_operand" "+r,r")) + (mem:BLK (match_operand:SI 1 "register_operand" "+r,r"))) + (clobber (match_operand:SI 2 "register_operand" "=&r,&r")) ;loop cnt/tmp (clobber (match_operand:SI 3 "register_operand" "=&r,&r")) ;item tmp1 (clobber (match_operand:SI 6 "register_operand" "=&r,&r")) ;item tmp2 (clobber (match_dup 0)) @@ -3360,7 +3360,7 @@ (define_insn "movstrdi_prereload" [(set (mem:BLK (match_operand:DI 0 "register_operand" "r,r")) (mem:BLK (match_operand:DI 1 "register_operand" "r,r"))) - (clobber (match_operand:DI 2 "register_operand" "=r,r")) ;loop cnt/tmp + (clobber (match_operand:DI 2 "register_operand" "=&r,&r")) ;loop cnt/tmp (clobber (match_operand:DI 3 "register_operand" "=&r,&r")) ;item tmp1 (clobber (match_operand:DI 6 "register_operand" "=&r,&r")) ;item tmp2 (clobber (match_operand:DI 7 "register_operand" "=&r,&r")) ;item tmp3 @@ -3429,9 +3429,9 @@ }") (define_insn "movstrdi_postreload" - [(set (mem:BLK (match_operand:DI 0 "register_operand" "r,r")) - (mem:BLK (match_operand:DI 1 "register_operand" "r,r"))) - (clobber (match_operand:DI 2 "register_operand" "=r,r")) ;loop cnt/tmp + [(set (mem:BLK (match_operand:DI 0 "register_operand" "+r,r")) + (mem:BLK (match_operand:DI 1 "register_operand" "+r,r"))) + (clobber (match_operand:DI 2 "register_operand" "=&r,&r")) ;loop cnt/tmp (clobber (match_operand:DI 3 "register_operand" "=&r,&r")) ;item tmp1 (clobber (match_operand:DI 6 "register_operand" "=&r,&r")) ;item tmp2 (clobber (match_dup 0)) @@ -3482,7 +3482,7 @@ (define_insn "clrstrsi_prereload" [(set (mem:BLK (match_operand:SI 0 "register_operand" "r,r")) (const_int 0)) - (clobber (match_operand:SI 1 "register_operand" "=r,r")) ;loop cnt/tmp + (clobber (match_operand:SI 1 "register_operand" "=&r,&r")) ;loop cnt/tmp (clobber (match_operand:SI 4 "register_operand" "=&r,&r")) ;tmp1 (use (match_operand:SI 2 "arith_operand" "J,1")) ;byte count (use (match_operand:SI 3 "const_int_operand" "n,n"))] ;alignment @@ -3530,9 +3530,9 @@ }") (define_insn "clrstrsi_postreload" - [(set (mem:BLK (match_operand:SI 0 "register_operand" "r,r")) + [(set (mem:BLK (match_operand:SI 0 "register_operand" "+r,r")) (const_int 0)) - (clobber (match_operand:SI 1 "register_operand" "=r,r")) ;loop cnt/tmp + (clobber (match_operand:SI 1 "register_operand" "=&r,&r")) ;loop cnt/tmp (clobber (match_dup 0)) (use (match_operand:SI 2 "arith_operand" "J,1")) ;byte count (use (match_operand:SI 3 "const_int_operand" "n,n")) ;alignment @@ -3580,7 +3580,7 @@ (define_insn "clrstrdi_prereload" [(set (mem:BLK (match_operand:DI 0 "register_operand" "r,r")) (const_int 0)) - (clobber (match_operand:DI 1 "register_operand" "=r,r")) ;loop cnt/tmp + (clobber (match_operand:DI 1 "register_operand" "=&r,&r")) ;loop cnt/tmp (clobber (match_operand:DI 4 "register_operand" "=&r,&r")) ;item tmp1 (use (match_operand:DI 2 "arith_operand" "J,1")) ;byte count (use (match_operand:DI 3 "const_int_operand" "n,n"))] ;alignment @@ -3628,9 +3628,9 @@ }") (define_insn "clrstrdi_postreload" - [(set (mem:BLK (match_operand:DI 0 "register_operand" "r,r")) + [(set (mem:BLK (match_operand:DI 0 "register_operand" "+r,r")) (const_int 0)) - (clobber (match_operand:DI 1 "register_operand" "=r,r")) ;loop cnt/tmp + (clobber (match_operand:DI 1 "register_operand" "=&r,&r")) ;loop cnt/tmp (clobber (match_dup 0)) (use (match_operand:DI 2 "arith_operand" "J,1")) ;byte count (use (match_operand:DI 3 "const_int_operand" "n,n")) ;alignment |