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| author | Segher Boessenkool <segher@kernel.crashing.org> | 2019-12-20 00:15:19 +0000 |
|---|---|---|
| committer | Segher Boessenkool <segher@kernel.crashing.org> | 2020-02-06 18:03:47 +0000 |
| commit | 72b2f3317b4484b25e9a6cc3fd12e7f8c893fb56 (patch) | |
| tree | 0d9e80e5e9ecc09de1c484921529d5ab2f9916c0 /gcc | |
| parent | 201c2f785f4d4c9ad9a8df859e6d078ed86ecc79 (diff) | |
| download | gcc-72b2f3317b4484b25e9a6cc3fd12e7f8c893fb56.zip gcc-72b2f3317b4484b25e9a6cc3fd12e7f8c893fb56.tar.gz gcc-72b2f3317b4484b25e9a6cc3fd12e7f8c893fb56.tar.bz2 | |
rs6000: Use rldimi for 64-bit constants with high=low (PR93012)
We currently use an (up to) five instruction sequence to generate such
constants. After this change we just generate a 32-bit constant and do
a rotate-and-mask-insert instruction, making the sequence only up to
three instructions.
* config/rs6000/rs6000.c (rs6000_emit_set_long_const): Handle the case
where the low and the high 32 bits are equal to each other specially,
with an rldimi instruction.
gcc/testsuite/
* gcc.target/powerpc/pr93012.c: New.
Diffstat (limited to 'gcc')
| -rw-r--r-- | gcc/ChangeLog | 6 | ||||
| -rw-r--r-- | gcc/config/rs6000/rs6000.c | 9 | ||||
| -rw-r--r-- | gcc/testsuite/ChangeLog | 4 | ||||
| -rw-r--r-- | gcc/testsuite/gcc.target/powerpc/pr93012.c | 13 |
4 files changed, 32 insertions, 0 deletions
diff --git a/gcc/ChangeLog b/gcc/ChangeLog index 302137e..db03bf1 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,3 +1,9 @@ +2020-02-06 Segher Boessenkool <segher@kernel.crashing.org> + + * config/rs6000/rs6000.c (rs6000_emit_set_long_const): Handle the case + where the low and the high 32 bits are equal to each other specially, + with an rldimi instruction. + 2020-02-06 Mihail Ionescu <mihail.ionescu@arm.com> * config/arm/arm-cpus.in: Set profile M for armv8.1-m.main. diff --git a/gcc/config/rs6000/rs6000.c b/gcc/config/rs6000/rs6000.c index 7457956..f2516a8 100644 --- a/gcc/config/rs6000/rs6000.c +++ b/gcc/config/rs6000/rs6000.c @@ -9257,6 +9257,15 @@ rs6000_emit_set_long_const (rtx dest, HOST_WIDE_INT c) gen_lowpart (SImode, copy_rtx (temp)))); } + else if (ud1 == ud3 && ud2 == ud4) + { + temp = !can_create_pseudo_p () ? dest : gen_reg_rtx (DImode); + HOST_WIDE_INT num = (ud2 << 16) | ud1; + rs6000_emit_set_long_const (temp, (num ^ 0x80000000) - 0x80000000); + rtx one = gen_rtx_AND (DImode, temp, GEN_INT (0xffffffff)); + rtx two = gen_rtx_ASHIFT (DImode, temp, GEN_INT (32)); + emit_move_insn (dest, gen_rtx_IOR (DImode, one, two)); + } else if ((ud4 == 0xffff && (ud3 & 0x8000)) || (ud4 == 0 && ! (ud3 & 0x8000))) { diff --git a/gcc/testsuite/ChangeLog b/gcc/testsuite/ChangeLog index 9c208d0..fd80c8d 100644 --- a/gcc/testsuite/ChangeLog +++ b/gcc/testsuite/ChangeLog @@ -1,3 +1,7 @@ +2020-02-06 Segher Boessenkool <segher@kernel.crashing.org> + + * gcc.target/powerpc/pr93012.c: New. + 2020-02-06 Richard Sandiford <richard.sandiford@arm.com> PR target/87763 diff --git a/gcc/testsuite/gcc.target/powerpc/pr93012.c b/gcc/testsuite/gcc.target/powerpc/pr93012.c new file mode 100644 index 0000000..4f764d0 --- /dev/null +++ b/gcc/testsuite/gcc.target/powerpc/pr93012.c @@ -0,0 +1,13 @@ +/* PR target/93012 */ +/* { dg-do compile { target lp64 } } */ +/* { dg-options "-O2 -std=c99" } */ + +unsigned long long msk66() { return 0x6666666666666666ULL; } +unsigned long long mskih() { return 0xabcd1234abcd1234ULL; } +unsigned long long mskh0() { return 0x0000123400001234ULL; } +unsigned long long mskl0() { return 0xabcd0000abcd0000ULL; } +unsigned long long mskh1() { return 0xffff9234ffff9234ULL; } +unsigned long long mskl1() { return 0x2bcdffff2bcdffffULL; } +unsigned long long mskse() { return 0xffff1234ffff1234ULL; } + +/* { dg-final { scan-assembler-times {\mrldimi\M} 7 } } */ |