i386-protos.h (ix86_emit_mode_set): Add third argument.

	* config/i386/i386-protos.h (ix86_emit_mode_set): Add third argument.
	* config/i386/i386.h (EMIT_MODE_SET): Update.
	* config/i386/i386.c (ix86_avx_emit_vzeroupper): New function.
	(ix86_emit_mode_set) <AVX_U128>: Call ix86_avx_emit_vzeroupper.

From-SVN: r193550

4 files changed, 45 insertions, 16 deletions

diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index 4eb3039..c784188 100644
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,3 +1,10 @@
+2012-11-16  Uros Bizjak  <ubizjak@gmail.com>
+
+	* config/i386/i386-protos.h (ix86_emit_mode_set): Add third argument.
+	* config/i386/i386.h (EMIT_MODE_SET): Update.
+	* config/i386/i386.c (ix86_avx_emit_vzeroupper): New function.
+	(ix86_emit_mode_set) <AVX_U128>: Call ix86_avx_emit_vzeroupper.
+
 2012-11-16  Ganesh Gopalasubramanian  <Ganesh.Gopalasubramanian@amd.com>
 
 	bdver3 Enablement
@@ -7,11 +14,11 @@
 	(case ${target}): Add bdver3.
 	* config/i386/i386.h (TARGET_BDVER3): New definition.
 	* config/i386/i386.md (define_attr "cpu"): Add bdver3.
-	* config/i386/sse.md (sseshuf): New type attribute.
-	* config/i386/athlon.md (sseshuf):Likewise.
-	* config/i386/atom.md (sseshuf):Likewise.
-	* config/i386/ppro.md (sseshuf):Likewise.
-	* config/i386/bdver1.md (sseshuf):Likewise.
+	* config/i386/sse.md (sseshuf, sseshuf1): New type attributes.
+	* config/i386/athlon.md: Handle sseshuf attribute.
+	* config/i386/atom.md: Likewise.
+	* config/i386/ppro.md: Likewise.
+	* config/i386/bdver1.md: Likewise.
 	* config/i386/i386.opt (flag_dispatch_scheduler): Add bdver3.
 	* config/i386/i386-c.c (ix86_target_macros_internal): Add
 	bdver3 def_and_undef
@@ -25,8 +32,7 @@
 	(static const char *const cpu_names): Add bdver3 entry.
 	(software_prefetching_beneficial_p): Add bdver3.
 	(ix86_option_override_internal): Add bdver3 instruction sets.
-	(ix86_option_override_internal): Remove XSAVEOPT for bdver1 
-	and bdver2.
+	(ix86_option_override_internal): Remove XSAVEOPT for bdver1 and bdver2.
 	(ix86_issue_rate): Add bdver3.
 	(ix86_adjust_cost): Add bdver3.
 	(enum target_cpu_default): Add TARGET_CPU_DEFAULT_bdver3.
@@ -37,8 +43,7 @@
 
 	* expmed.c (expand_shift_1): Don't strip non-integral SUBREGs.
 
-	* configure.ac: Add check for assembler SPARC4 instruction
-	support.
+	* configure.ac: Add check for assembler SPARC4 instruction support.
 	* configure: Rebuild.
 	* config.in: Add HAVE_AS_SPARC4 section.
 	* config/sparc/sparc.opt (mcbcond): New option.
@@ -92,9 +97,8 @@
 	* asan.c (report_error_func): Set DECL_IGNORED_P, don't touch
 	DECL_ASSEMBLER_NAME.
 	(asan_init_func): Likewise.
-	(asan_finish_file): Use void * instead of __asan_global * as
-	type of __asan_{,un}register_globals.  Set DECL_IGNORED_P on
-	the decls.
+	(asan_finish_file): Use void * instead of __asan_global * as type of
+	__asan_{,un}register_globals.  Set DECL_IGNORED_P on the decls.
 
 2012-11-15  Matthias Klose  <doko@ubuntu.com>
 
diff --git a/gcc/config/i386/i386-protos.h b/gcc/config/i386/i386-protos.h
index 0d643b1..4c23f57 100644
--- a/gcc/config/i386/i386-protos.h
+++ b/gcc/config/i386/i386-protos.h
@@ -172,7 +172,10 @@ extern int ix86_mode_needed (int, rtx);
 extern int ix86_mode_after (int, int, rtx);
 extern int ix86_mode_entry (int);
 extern int ix86_mode_exit (int);
-extern void ix86_emit_mode_set (int, int);
+
+#ifdef HARD_CONST
+extern void ix86_emit_mode_set (int, int, HARD_REG_SET);
+#endif
 
 extern void x86_order_regs_for_local_alloc (void);
 extern void x86_function_profiler (FILE *, int);
diff --git a/gcc/config/i386/i386.c b/gcc/config/i386/i386.c
index eb1025f..b4e4e72 100644
--- a/gcc/config/i386/i386.c
+++ b/gcc/config/i386/i386.c
@@ -15477,16 +15477,38 @@ emit_i387_cw_initialization (int mode)
   emit_move_insn (new_mode, reg);
 }
 
+/* Emit vzeroupper.  */
+
+void
+ix86_avx_emit_vzeroupper (HARD_REG_SET regs_live)
+{
+  int i;
+
+  /* Cancel automatic vzeroupper insertion if there are
+     live call-saved SSE registers at the insertion point.  */
+
+  for (i = FIRST_SSE_REG; i <= LAST_SSE_REG; i++)
+    if (TEST_HARD_REG_BIT (regs_live, i) && !call_used_regs[i])
+      return;
+
+  if (TARGET_64BIT)
+    for (i = FIRST_REX_SSE_REG; i <= LAST_REX_SSE_REG; i++)
+      if (TEST_HARD_REG_BIT (regs_live, i) && !call_used_regs[i])
+	return;
+
+  emit_insn (gen_avx_vzeroupper ());
+}
+
 /* Generate one or more insns to set ENTITY to MODE.  */
 
 void
-ix86_emit_mode_set (int entity, int mode)
+ix86_emit_mode_set (int entity, int mode, HARD_REG_SET regs_live)
 {
   switch (entity)
     {
     case AVX_U128:
       if (mode == AVX_U128_CLEAN)
-	emit_insn (gen_avx_vzeroupper ());
+	ix86_avx_emit_vzeroupper (regs_live);
       break;
     case I387_TRUNC:
     case I387_FLOOR:
diff --git a/gcc/config/i386/i386.h b/gcc/config/i386/i386.h
index d34cfa4..0cdbee1 100644
--- a/gcc/config/i386/i386.h
+++ b/gcc/config/i386/i386.h
@@ -2226,7 +2226,7 @@ enum avx_u128_state
    are to be inserted.  */
 
 #define EMIT_MODE_SET(ENTITY, MODE, HARD_REGS_LIVE) \
-  ix86_emit_mode_set ((ENTITY), (MODE))
+  ix86_emit_mode_set ((ENTITY), (MODE), (HARD_REGS_LIVE))
 
 /* Avoid renaming of stack registers, as doing so in combination with
    scheduling just increases amount of live registers at time and in