configure.ac (mipsisa*-*-elfoabi*): New stanza.

	* configure.ac (mipsisa*-*-elfoabi*): New stanza.
	* configure: Regenerate.

config/
	* mt-mips-elfoabi: New file.

gcc/
	* doc/invoke.texi (-minterlink-mips16): Document.
	* config/mips/mips.opt (minterlink-mips16): New option.
	* config/mips/mips.c (mips_function_ok_for_sibcall): Handle
	-minterlink-mips16

From-SVN: r128625

4 files changed, 35 insertions, 0 deletions

diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index a3854f3..72df51a 100644
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,3 +1,10 @@
+2007-09-20  Richard Sandiford  <rsandifo@nildram.co.uk>
+
+	* doc/invoke.texi (-minterlink-mips16): Document.
+	* config/mips/mips.opt (minterlink-mips16): New option.
+	* config/mips/mips.c (mips_function_ok_for_sibcall): Handle
+	-minterlink-mips16
+
 2007-09-20  Joseph Myers  <joseph@codesourcery.com>
 
 	* doc/extend.texi (Attribute Syntax): Remove old speculative
diff --git a/gcc/config/mips/mips.c b/gcc/config/mips/mips.c
index 7f959f4..f2c8ba9 100644
--- a/gcc/config/mips/mips.c
+++ b/gcc/config/mips/mips.c
@@ -4256,6 +4256,17 @@ mips_function_ok_for_sibcall (tree decl, tree exp ATTRIBUTE_UNUSED)
   if (mips_use_mips16_mode_p (decl))
     return false;
 
+  /* ...and when -minterlink-mips16 is in effect, assume that external
+     functions could be MIPS16 ones unless an attribute explicitly
+     tells us otherwise.  We only care about cases where the sibling
+     and normal calls would both be direct.  */
+  if (TARGET_INTERLINK_MIPS16
+      && decl
+      && DECL_EXTERNAL (decl)
+      && !mips_nomips16_decl_p (decl)
+      && const_call_insn_operand (XEXP (DECL_RTL (decl), 0), VOIDmode))
+    return false;
+
   /* Otherwise OK.  */
   return true;
 }
diff --git a/gcc/config/mips/mips.opt b/gcc/config/mips/mips.opt
index bbbc305..05aedda 100644
--- a/gcc/config/mips/mips.opt
+++ b/gcc/config/mips/mips.opt
@@ -164,6 +164,10 @@ mhard-float
 Target Report RejectNegative InverseMask(SOFT_FLOAT_ABI, HARD_FLOAT_ABI)
 Allow the use of hardware floating-point ABI and instructions
 
+minterlink-mips16
+Target Report Var(TARGET_INTERLINK_MIPS16) Init(0)
+Generate code that can be safely linked with MIPS16 code.
+
 mips
 Target RejectNegative Joined
 -mipsN	Generate code for ISA level N
diff --git a/gcc/doc/invoke.texi b/gcc/doc/invoke.texi
index ddd95a4..7f85b7e 100644
--- a/gcc/doc/invoke.texi
+++ b/gcc/doc/invoke.texi
@@ -623,6 +623,7 @@ Objective-C and Objective-C++ Dialects}.
 @gccoptlist{-EL  -EB  -march=@var{arch}  -mtune=@var{arch} @gol
 -mips1  -mips2  -mips3  -mips4  -mips32  -mips32r2  -mips64 @gol
 -mips16  -mno-mips16  -mflip-mips16 @gol
+-minterlink-mips16  -mno-interlink-mips16 @gol
 -mabi=@var{abi}  -mabicalls  -mno-abicalls @gol
 -mshared  -mno-shared  -mxgot  -mno-xgot  -mgp32  -mgp64 @gol
 -mfp32  -mfp64  -mhard-float  -msoft-float @gol
@@ -11684,6 +11685,18 @@ Generate MIPS16 code on alternating functions.  This option is provided
 for regression testing of mixed MIPS16/non-MIPS16 code generation, and is
 not intended for ordinary use in compiling user code.
 
+@item -minterlink-mips16
+@itemx -mno-interlink-mips16
+@opindex minterlink-mips16
+@opindex mno-interlink-mips16
+Require (do not require) that non-MIPS16 code be link-compatible with
+MIPS16 code.
+
+For example, non-MIPS16 code cannot jump directly to MIPS16 code;
+it must either use a call or an indirect jump.  @option{-minterlink-mips16}
+therefore disables direct jumps unless GCC knows that the target of the
+jump is not MIPS16.
+
 @item -mabi=32
 @itemx -mabi=o64
 @itemx -mabi=n32