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| author | Roger Sayle <roger@eyesopen.com> | 2006-04-26 00:51:14 +0000 |
|---|---|---|
| committer | Roger Sayle <sayle@gcc.gnu.org> | 2006-04-26 00:51:14 +0000 |
| commit | f7acbf4c824c9486072210648c86a7df28eb8f3e (patch) | |
| tree | 1aae3ef33166342b584dde15d93a18e829caac8b /gcc | |
| parent | a22b8ac1e4cae83b56d649add7f54be84f000453 (diff) | |
| download | gcc-f7acbf4c824c9486072210648c86a7df28eb8f3e.zip gcc-f7acbf4c824c9486072210648c86a7df28eb8f3e.tar.gz gcc-f7acbf4c824c9486072210648c86a7df28eb8f3e.tar.bz2 | |
expmed.c (store_bit_field): Also check whether the bitsize is valid for the machine's "insv" instruction...
* expmed.c (store_bit_field): Also check whether the bitsize is
valid for the machine's "insv" instruction before moving the
target into a pseudo for use with the insv.
* config/i386/predicates.md (const8_operand): New predicate.
* config/i386/i386.md (extv, extzv, insv): Use the new
const8_operand predicate where appropriate.
From-SVN: r113265
Diffstat (limited to 'gcc')
| -rw-r--r-- | gcc/ChangeLog | 9 | ||||
| -rw-r--r-- | gcc/config/i386/i386.md | 14 | ||||
| -rw-r--r-- | gcc/config/i386/predicates.md | 5 | ||||
| -rw-r--r-- | gcc/expmed.c | 4 |
4 files changed, 24 insertions, 8 deletions
diff --git a/gcc/ChangeLog b/gcc/ChangeLog index ca604af..7bf04ef 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,3 +1,12 @@ +2006-04-25 Roger Sayle <roger@eyesopen.com> + + * expmed.c (store_bit_field): Also check whether the bitsize is + valid for the machine's "insv" instruction before moving the + target into a pseudo for use with the insv. + * config/i386/predicates.md (const8_operand): New predicate. + * config/i386/i386.md (extv, extzv, insv): Use the new + const8_operand predicate where appropriate. + 2006-04-25 DJ Delorie <dj@redhat.com> * doc/install.texi (Specific): Clarify that this is not a list of diff --git a/gcc/config/i386/i386.md b/gcc/config/i386/i386.md index 669c0ea..e08d1753 100644 --- a/gcc/config/i386/i386.md +++ b/gcc/config/i386/i386.md @@ -12501,8 +12501,8 @@ (define_expand "extv" [(set (match_operand:SI 0 "register_operand" "") (sign_extract:SI (match_operand:SI 1 "register_operand" "") - (match_operand:SI 2 "immediate_operand" "") - (match_operand:SI 3 "immediate_operand" "")))] + (match_operand:SI 2 "const8_operand" "") + (match_operand:SI 3 "const8_operand" "")))] "" { /* Handle extractions from %ah et al. */ @@ -12518,8 +12518,8 @@ (define_expand "extzv" [(set (match_operand:SI 0 "register_operand" "") (zero_extract:SI (match_operand 1 "ext_register_operand" "") - (match_operand:SI 2 "immediate_operand" "") - (match_operand:SI 3 "immediate_operand" "")))] + (match_operand:SI 2 "const8_operand" "") + (match_operand:SI 3 "const8_operand" "")))] "" { /* Handle extractions from %ah et al. */ @@ -12534,12 +12534,12 @@ (define_expand "insv" [(set (zero_extract (match_operand 0 "ext_register_operand" "") - (match_operand 1 "immediate_operand" "") - (match_operand 2 "immediate_operand" "")) + (match_operand 1 "const8_operand" "") + (match_operand 2 "const8_operand" "")) (match_operand 3 "register_operand" ""))] "" { - /* Handle extractions from %ah et al. */ + /* Handle insertions to %ah et al. */ if (INTVAL (operands[1]) != 8 || INTVAL (operands[2]) != 8) FAIL; diff --git a/gcc/config/i386/predicates.md b/gcc/config/i386/predicates.md index acc01ee..24f741b 100644 --- a/gcc/config/i386/predicates.md +++ b/gcc/config/i386/predicates.md @@ -544,6 +544,11 @@ (and (match_code "const_int") (match_test "op == const1_rtx"))) +;; Match exactly eight. +(define_predicate "const8_operand" + (and (match_code "const_int") + (match_test "INTVAL (op) == 8"))) + ;; Match 2, 4, or 8. Used for leal multiplicands. (define_predicate "const248_operand" (match_code "const_int") diff --git a/gcc/expmed.c b/gcc/expmed.c index 31b8241..5a32366 100644 --- a/gcc/expmed.c +++ b/gcc/expmed.c @@ -636,7 +636,9 @@ store_bit_field (rtx str_rtx, unsigned HOST_WIDE_INT bitsize, && bitsize > 0 && GET_MODE_BITSIZE (op_mode) >= bitsize && ! ((REG_P (op0) || GET_CODE (op0) == SUBREG) - && (bitsize + bitpos > GET_MODE_BITSIZE (op_mode)))) + && (bitsize + bitpos > GET_MODE_BITSIZE (op_mode))) + && insn_data[CODE_FOR_insv].operand[1].predicate (GEN_INT (bitsize), + VOIDmode)) { int xbitpos = bitpos; rtx value1; |