h8300.md (ors code_iterator): New.

	* config/h8300/h8300.md (ors code_iterator): New.
	(bsetqi_msx, bnotqi_msx patterns and splitters): Consolidate into
	a single pattern and single splitter.
	(bsethi_msx, bnothi_msx patterns): Consolidate into a single pattern.
	(iorqi3_1, xorqi3_1): Likewise.
	(iorqi3, xorqi3 expanders): Similarly.

From-SVN: r262366

2 files changed, 26 insertions, 98 deletions

diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index 9e27699..c123469 100644
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,4 +1,12 @@
 2018-07-03  Jeff Law  <law@redhat.com>
+
+	* config/h8300/h8300.md (ors code_iterator): New.
+	(bsetqi_msx, bnotqi_msx patterns and splitters): Consolidate into
+	a single pattern and single splitter.
+	(bsethi_msx, bnothi_msx patterns): Consolidate into a single pattern.
+	(iorqi3_1, xorqi3_1): Likewise.
+	(iorqi3, xorqi3 expanders): Similarly.
+
 	* config/h8300/h8300.md (movmd_internal_normal): Consolidated with
 	(movmd_internal) into a single pattern using the P mode iterator.
 	(movmd splitters): Similarly.
diff --git a/gcc/config/h8300/h8300.md b/gcc/config/h8300/h8300.md
index e654784..f3cf421 100644
--- a/gcc/config/h8300/h8300.md
+++ b/gcc/config/h8300/h8300.md
@@ -193,6 +193,8 @@
 (define_mode_iterator QHSIF [QI HI SI SF])
 
 (define_code_iterator shifts [ashift ashiftrt lshiftrt])
+
+(define_code_iterator ors [ior xor])
 
 ;; ----------------------------------------------------------------------
 ;; MOVE INSTRUCTIONS
@@ -1597,126 +1599,44 @@
   [(set_attr "length" "2")])
 
 ;; ----------------------------------------------------------------------
-;; OR INSTRUCTIONS
+;; OR/XOR INSTRUCTIONS
 ;; ----------------------------------------------------------------------
 
-(define_insn "bsetqi_msx"
+(define_insn "b<code>qi_msx"
   [(set (match_operand:QI 0 "bit_register_indirect_operand" "=WU")
-	(ior:QI (match_operand:QI 1 "bit_register_indirect_operand" "%0")
+	(ors:QI (match_operand:QI 1 "bit_register_indirect_operand" "%0")
 		(match_operand:QI 2 "single_one_operand" "Y2")))]
   "TARGET_H8300SX && rtx_equal_p (operands[0], operands[1])"
-  "bset\\t%V2,%0"
+  { return <CODE> == IOR ? "bset\\t%V2,%0" : "bnot\\t%V2,%0"; }
   [(set_attr "length" "8")])
 
-(define_split
-  [(set (match_operand:HI 0 "bit_register_indirect_operand")
-	(ior:HI (match_operand:HI 1 "bit_register_indirect_operand")
-		(match_operand:HI 2 "single_one_operand")))]
-  "TARGET_H8300SX"
-  [(set (match_dup 0)
-	(ior:QI (match_dup 1)
-		(match_dup 2)))]
-  {
-    if (abs (INTVAL (operands[2])) > 0xFF)
-      {
-	operands[0] = adjust_address (operands[0], QImode, 0);
-	operands[1] = adjust_address (operands[1], QImode, 0);
-	operands[2] = GEN_INT ((INTVAL (operands[2])) >> 8);
-      }
-    else
-      {
-	operands[0] = adjust_address (operands[0], QImode, 1);
-	operands[1] = adjust_address (operands[1], QImode, 1);
-      }
-  })
-
-(define_insn "bsethi_msx"
+(define_insn "b<code>hi_msx"
   [(set (match_operand:HI 0 "bit_register_indirect_operand" "=m")
-	(ior:HI (match_operand:HI 1 "bit_register_indirect_operand" "%0")
+	(ors:HI (match_operand:HI 1 "bit_register_indirect_operand" "%0")
 		(match_operand:HI 2 "single_one_operand" "Y2")))]
   "TARGET_H8300SX"
-  "bset\\t%V2,%0"
+  { return <CODE> == IOR ? "bset\\t%V2,%0" : "bnot\\t%V2,%0"; }
   [(set_attr "length" "8")])
 
-(define_insn "iorqi3_1"
+(define_insn "<code>qi3_1"
   [(set (match_operand:QI 0 "bit_operand" "=U,rQ")
-	(ior:QI (match_operand:QI 1 "bit_operand" "%0,0")
+	(ors:QI (match_operand:QI 1 "bit_operand" "%0,0")
 		(match_operand:QI 2 "h8300_src_operand" "Y2,rQi")))]
   "TARGET_H8300SX || register_operand (operands[0], QImode)
    || single_one_operand (operands[2], QImode)"
-  "@
-   bset\\t%V2,%R0
-   or\\t%X2,%X0"
-  [(set_attr "length" "8,*")
-   (set_attr "length_table" "*,logicb")
-   (set_attr "cc" "none_0hit,set_znv")])
-
-(define_expand "ior<mode>3"
-  [(set (match_operand:QHSI 0 "register_operand" "")
-	(ior:QHSI (match_operand:QHSI 1 "register_operand" "")
-		  (match_operand:QHSI 2 "h8300_src_operand" "")))]
-  ""
-  "")
-
-;; ----------------------------------------------------------------------
-;; XOR INSTRUCTIONS
-;; ----------------------------------------------------------------------
-
-(define_insn "bnotqi_msx"
-  [(set (match_operand:QI 0 "bit_register_indirect_operand" "=WU")
-	(xor:QI (match_operand:QI 1 "bit_register_indirect_operand" "%0")
-		(match_operand:QI 2 "single_one_operand" "Y2")))]
-  "TARGET_H8300SX
-   && rtx_equal_p (operands[0], operands[1])"
-  "bnot\\t%V2,%0"
-  [(set_attr "length" "8")])
-
-(define_split
-  [(set (match_operand:HI 0 "bit_register_indirect_operand")
-	(xor:HI (match_operand:HI 1 "bit_register_indirect_operand")
-		(match_operand:HI 2 "single_one_operand")))]
-  "TARGET_H8300SX"
-  [(set (match_dup 0)
-	(xor:QI (match_dup 1)
-		(match_dup 2)))]
   {
-    if (abs (INTVAL (operands[2])) > 0xFF)
-      {
-	operands[0] = adjust_address (operands[0], QImode, 0);
-	operands[1] = adjust_address (operands[1], QImode, 0);
-	operands[2] = GEN_INT ((INTVAL (operands[2])) >> 8);
-      }
-    else
-      {
-	operands[0] = adjust_address (operands[0], QImode, 1);
-	operands[1] = adjust_address (operands[1], QImode, 1);
-      }
-  })
-
-(define_insn "bnothi_msx"
-  [(set (match_operand:HI 0 "bit_register_indirect_operand" "=m")
-	(xor:HI (match_operand:HI 1 "bit_register_indirect_operand" "%0")
-		(match_operand:HI 2 "single_one_operand" "Y2")))]
-  "TARGET_H8300SX"
-  "bnot\\t%V2,%0"
-  [(set_attr "length" "8")])
-
-(define_insn "xorqi3_1"
-  [(set (match_operand:QI 0 "bit_operand" "=U,r")
-	(xor:QI (match_operand:QI 1 "bit_operand" "%0,0")
-		(match_operand:QI 2 "h8300_src_operand" "Y2,rQi")))]
-  "TARGET_H8300SX || register_operand (operands[0], QImode)
-   || single_one_operand (operands[2], QImode)"
-  "@
-   bnot\\t%V2,%R0
-   xor\\t%X2,%X0"
+    if (which_alternative == 0)
+      return <CODE> == IOR ? "bset\\t%V2,%R0" : "bnot\\t%V2,%R0"; 
+    else if (which_alternative == 1)
+      return <CODE> == IOR ? "or\\t%X2,%X0" : "xor\\t%X2,%X0";
+  }
   [(set_attr "length" "8,*")
    (set_attr "length_table" "*,logicb")
    (set_attr "cc" "none_0hit,set_znv")])
 
-(define_expand "xor<mode>3"
+(define_expand "<code><mode>3"
   [(set (match_operand:QHSI 0 "register_operand" "")
-	(xor:QHSI (match_operand:QHSI 1 "register_operand" "")
+	(ors:QHSI (match_operand:QHSI 1 "register_operand" "")
 		  (match_operand:QHSI 2 "h8300_src_operand" "")))]
   ""
   "")