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| author | Richard Henderson <rth@redhat.com> | 2005-06-29 11:13:27 -0700 |
|---|---|---|
| committer | Richard Henderson <rth@gcc.gnu.org> | 2005-06-29 11:13:27 -0700 |
| commit | afc1ab6196fd6b3f96da19b5859929ec70d8c4dc (patch) | |
| tree | 21e4e4b0f66cf9b9e02db590e6dd2170c1cf352f /gcc | |
| parent | affb0e06f4c928c65c0216d8a4ce4c8f9e9c272a (diff) | |
| download | gcc-afc1ab6196fd6b3f96da19b5859929ec70d8c4dc.zip gcc-afc1ab6196fd6b3f96da19b5859929ec70d8c4dc.tar.gz gcc-afc1ab6196fd6b3f96da19b5859929ec70d8c4dc.tar.bz2 | |
tree-vect-transform.c (vect_min_worthwhile_factor): Declare.
* tree-vect-transform.c (vect_min_worthwhile_factor): Declare.
(vect_create_epilog_for_reduction): Don't use vec_shr if the
operation is emulated.
(vectorizable_reduction): Duplicate vect_min_worthwhile_factor
tests from vectorizable_operation.
From-SVN: r101433
Diffstat (limited to 'gcc')
| -rw-r--r-- | gcc/ChangeLog | 8 | ||||
| -rw-r--r-- | gcc/tree-vect-transform.c | 31 |
2 files changed, 39 insertions, 0 deletions
diff --git a/gcc/ChangeLog b/gcc/ChangeLog index 8ad8dd7..9849127 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,3 +1,11 @@ +2005-06-29 Richard Henderson <rth@redhat.com> + + * tree-vect-transform.c (vect_min_worthwhile_factor): Declare. + (vect_create_epilog_for_reduction): Don't use vec_shr if the + operation is emulated. + (vectorizable_reduction): Duplicate vect_min_worthwhile_factor + tests from vectorizable_operation. + 2005-06-29 Caroline Tice <ctice@apple.com> Fix PR 21956 diff --git a/gcc/tree-vect-transform.c b/gcc/tree-vect-transform.c index 7d15309..2929bdb 100644 --- a/gcc/tree-vect-transform.c +++ b/gcc/tree-vect-transform.c @@ -72,6 +72,7 @@ static void vect_update_inits_of_drs (loop_vec_info, tree); static void vect_do_peeling_for_alignment (loop_vec_info, struct loops *); static void vect_do_peeling_for_loop_bound (loop_vec_info, tree *, struct loops *); +static int vect_min_worthwhile_factor (enum tree_code); /* Function vect_get_new_vect_var. @@ -940,6 +941,21 @@ vect_create_epilog_for_reduction (tree vect_def, tree stmt, tree reduction_op, else have_whole_vector_shift = false; + /* Regardless of whether we have a whole vector shift, if we're + emulating the operation via tree-vect-generic, we don't want + to use it. Only the first round of the reduction is likely + to still be profitable via emulation. */ + /* ??? It might be better to emit a reduction tree code here, so that + tree-vect-generic can expand the first round via bit tricks. */ + if (!VECTOR_MODE_P (mode)) + have_whole_vector_shift = false; + else + { + optab optab = optab_for_tree_code (code, vectype); + if (optab->handlers[mode].insn_code == CODE_FOR_nothing) + have_whole_vector_shift = false; + } + if (have_whole_vector_shift) { /*** Case 2: @@ -1211,6 +1227,21 @@ vectorizable_reduction (tree stmt, block_stmt_iterator *bsi, tree *vec_stmt) { if (vect_print_dump_info (REPORT_DETAILS, UNKNOWN_LOC)) fprintf (vect_dump, "op not supported by target."); + if (GET_MODE_SIZE (vec_mode) != UNITS_PER_WORD + || LOOP_VINFO_VECT_FACTOR (loop_vinfo) + < vect_min_worthwhile_factor (code)) + return false; + if (vect_print_dump_info (REPORT_DETAILS, UNKNOWN_LOC)) + fprintf (vect_dump, "proceeding using word mode."); + } + + /* Worthwhile without SIMD support? */ + if (!VECTOR_MODE_P (TYPE_MODE (vectype)) + && LOOP_VINFO_VECT_FACTOR (loop_vinfo) + < vect_min_worthwhile_factor (code)) + { + if (vect_print_dump_info (REPORT_DETAILS, UNKNOWN_LOC)) + fprintf (vect_dump, "not worthwhile without SIMD support."); return false; } |