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author | Richard Henderson <rth@redhat.com> | 2005-06-27 23:16:57 -0700 |
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committer | Richard Henderson <rth@gcc.gnu.org> | 2005-06-27 23:16:57 -0700 |
commit | 69a2964c42159ac49c3ce1b372082a50798064bb (patch) | |
tree | c6be694da2b1f952e3dcc140639bba297122d082 /gcc | |
parent | 46ae108707e53e994a2ee93a0f782a61f9bc0c9c (diff) | |
download | gcc-69a2964c42159ac49c3ce1b372082a50798064bb.zip gcc-69a2964c42159ac49c3ce1b372082a50798064bb.tar.gz gcc-69a2964c42159ac49c3ce1b372082a50798064bb.tar.bz2 |
sse.md (vec_shl_<SSEMODEI>, [...]): New.
* config/i386/sse.md (vec_shl_<SSEMODEI>, vec_shr_<SSEMODEI>): New.
(smaxv16qi3, umaxv8hi3, sminv16qi3, uminv8hi3): New.
* gcc.dg/vect/vect-reduc-1short.c: Remove XFAIL.
* gcc.dg/vect/vect-reduc-2char.c: Remove XFAIL.
From-SVN: r101373
Diffstat (limited to 'gcc')
-rw-r--r-- | gcc/ChangeLog | 5 | ||||
-rw-r--r-- | gcc/config/i386/sse.md | 96 | ||||
-rw-r--r-- | gcc/testsuite/ChangeLog | 5 | ||||
-rw-r--r-- | gcc/testsuite/gcc.dg/vect/vect-reduc-1short.c | 2 | ||||
-rw-r--r-- | gcc/testsuite/gcc.dg/vect/vect-reduc-2char.c | 2 |
5 files changed, 108 insertions, 2 deletions
diff --git a/gcc/ChangeLog b/gcc/ChangeLog index f2d29d0..7bc4af6 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,5 +1,10 @@ 2005-06-27 Richard Henderson <rth@redhat.com> + * config/i386/sse.md (vec_shl_<SSEMODEI>, vec_shr_<SSEMODEI>): New. + (smaxv16qi3, umaxv8hi3, sminv16qi3, uminv8hi3): New. + +2005-06-27 Richard Henderson <rth@redhat.com> + * tree-vect-transform.c (vect_create_epilog_for_reduction): Remove duplicate little-endian adjustment. diff --git a/gcc/config/i386/sse.md b/gcc/config/i386/sse.md index e7523e7..16059bb 100644 --- a/gcc/config/i386/sse.md +++ b/gcc/config/i386/sse.md @@ -2705,6 +2705,18 @@ [(set_attr "type" "sseishft") (set_attr "mode" "TI")]) +(define_expand "vec_shl_<mode>" + [(set (match_operand:SSEMODEI 0 "register_operand" "") + (ashift:TI (match_operand:SSEMODEI 1 "register_operand" "") + (match_operand:SI 2 "general_operand" "")))] + "TARGET_SSE2" +{ + if (!const_0_to_255_mul_8_operand (operands[2], SImode)) + FAIL; + operands[0] = gen_lowpart (TImode, operands[0]); + operands[1] = gen_lowpart (TImode, operands[1]); +}) + (define_insn "sse2_lshrti3" [(set (match_operand:TI 0 "register_operand" "=x") (lshiftrt:TI (match_operand:TI 1 "register_operand" "0") @@ -2717,6 +2729,33 @@ [(set_attr "type" "sseishft") (set_attr "mode" "TI")]) +(define_expand "vec_shr_<mode>" + [(set (match_operand:SSEMODEI 0 "register_operand" "") + (lshiftrt:TI (match_operand:SSEMODEI 1 "register_operand" "") + (match_operand:SI 2 "general_operand" "")))] + "TARGET_SSE2" +{ + if (!const_0_to_255_mul_8_operand (operands[2], SImode)) + FAIL; + operands[0] = gen_lowpart (TImode, operands[0]); + operands[1] = gen_lowpart (TImode, operands[1]); +}) + +(define_expand "smaxv16qi3" + [(set (match_operand:V16QI 0 "register_operand" "") + (smax:V16QI (match_operand:V16QI 1 "register_operand" "") + (match_operand:V16QI 2 "register_operand" "")))] + "TARGET_SSE2" +{ + bool ok; + operands[3] = gen_rtx_GT (VOIDmode, operands[1], operands[2]); + operands[4] = operands[1]; + operands[5] = operands[2]; + ok = ix86_expand_int_vcond (operands, false); + gcc_assert (ok); + DONE; +}) + (define_expand "umaxv16qi3" [(set (match_operand:V16QI 0 "register_operand" "") (umax:V16QI (match_operand:V16QI 1 "nonimmediate_operand" "") @@ -2749,6 +2788,42 @@ [(set_attr "type" "sseiadd") (set_attr "mode" "TI")]) +(define_expand "umaxv8hi3" + [(set (match_operand:V8HI 0 "register_operand" "") + (umax:V8HI (match_operand:V8HI 1 "register_operand" "") + (match_operand:V8HI 2 "register_operand" "")))] + "TARGET_SSE2" +{ + rtx t1, t2; + bool ok; + + t1 = gen_reg_rtx (V8HImode); + emit_insn (gen_sse2_ussubv8hi3 (t1, operands[2], operands[1])); + t2 = force_reg (V8HImode, CONST0_RTX (V8HImode)); + + operands[3] = gen_rtx_EQ (VOIDmode, t1, t2); + operands[4] = t1; + operands[5] = t2; + ok = ix86_expand_int_vcond (operands, false); + gcc_assert (ok); + DONE; +}) + +(define_expand "sminv16qi3" + [(set (match_operand:V16QI 0 "register_operand" "") + (smin:V16QI (match_operand:V16QI 1 "register_operand" "") + (match_operand:V16QI 2 "register_operand" "")))] + "TARGET_SSE2" +{ + bool ok; + operands[3] = gen_rtx_GT (VOIDmode, operands[1], operands[2]); + operands[4] = operands[2]; + operands[5] = operands[1]; + ok = ix86_expand_int_vcond (operands, false); + gcc_assert (ok); + DONE; +}) + (define_expand "uminv16qi3" [(set (match_operand:V16QI 0 "register_operand" "") (umin:V16QI (match_operand:V16QI 1 "nonimmediate_operand" "") @@ -2781,6 +2856,27 @@ [(set_attr "type" "sseiadd") (set_attr "mode" "TI")]) +(define_expand "uminv8hi3" + [(set (match_operand:V8HI 0 "register_operand" "") + (umin:V8HI (match_operand:V8HI 1 "register_operand" "") + (match_operand:V8HI 2 "register_operand" "")))] + "TARGET_SSE2" +{ + rtx t1, t2; + bool ok; + + t1 = gen_reg_rtx (V8HImode); + emit_insn (gen_sse2_ussubv8hi3 (t1, operands[1], operands[2])); + t2 = force_reg (V8HImode, CONST0_RTX (V8HImode)); + + operands[3] = gen_rtx_EQ (VOIDmode, t1, t2); + operands[4] = t1; + operands[5] = t2; + ok = ix86_expand_int_vcond (operands, false); + gcc_assert (ok); + DONE; +}) + ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;; ;; ;; Parallel integral comparisons diff --git a/gcc/testsuite/ChangeLog b/gcc/testsuite/ChangeLog index 5c4b635..09e3e65 100644 --- a/gcc/testsuite/ChangeLog +++ b/gcc/testsuite/ChangeLog @@ -1,3 +1,8 @@ +2005-06-27 Richard Henderson <rth@redhat.com> + + * gcc.dg/vect/vect-reduc-1short.c: Remove XFAIL. + * gcc.dg/vect/vect-reduc-2char.c: Remove XFAIL. + 2005-06-27 Ziemowit Laski <zlaski@apple.com> * obj-c++.dg/proto-lossage-5.mm: New. diff --git a/gcc/testsuite/gcc.dg/vect/vect-reduc-1short.c b/gcc/testsuite/gcc.dg/vect/vect-reduc-1short.c index bd116be..6212f4c 100644 --- a/gcc/testsuite/gcc.dg/vect/vect-reduc-1short.c +++ b/gcc/testsuite/gcc.dg/vect/vect-reduc-1short.c @@ -47,5 +47,5 @@ int main (void) return 0; } -/* { dg-final { scan-tree-dump-times "vectorized 3 loops" 1 "vect" { xfail i?86-*-* x86_64-*-* } } } */ +/* { dg-final { scan-tree-dump-times "vectorized 3 loops" 1 "vect" } } */ /* { dg-final { cleanup-tree-dump "vect" } } */ diff --git a/gcc/testsuite/gcc.dg/vect/vect-reduc-2char.c b/gcc/testsuite/gcc.dg/vect/vect-reduc-2char.c index eddc2cf..cd8b130 100644 --- a/gcc/testsuite/gcc.dg/vect/vect-reduc-2char.c +++ b/gcc/testsuite/gcc.dg/vect/vect-reduc-2char.c @@ -47,5 +47,5 @@ int main (void) return 0 ; } -/* { dg-final { scan-tree-dump-times "vectorized 3 loops" 1 "vect" { xfail i?86-*-* x86_64-*-* } } } */ +/* { dg-final { scan-tree-dump-times "vectorized 3 loops" 1 "vect" } } */ /* { dg-final { cleanup-tree-dump "vect" } } */ |