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| author | Vladimir Makarov <vmakarov@redhat.com> | 2009-09-03 18:33:25 +0000 |
|---|---|---|
| committer | Vladimir Makarov <vmakarov@gcc.gnu.org> | 2009-09-03 18:33:25 +0000 |
| commit | 691571d285aefbe5dbc80202fa5e7ffb7d95be9b (patch) | |
| tree | e27c07f57199ff5f91cca9b2886d35f348e9bc06 /gcc | |
| parent | 10e1bc0371938bdc3951e43947253c490353a947 (diff) | |
| download | gcc-691571d285aefbe5dbc80202fa5e7ffb7d95be9b.zip gcc-691571d285aefbe5dbc80202fa5e7ffb7d95be9b.tar.gz gcc-691571d285aefbe5dbc80202fa5e7ffb7d95be9b.tar.bz2 | |
re PR bootstrap/41241 (bootstrap comparison failure)
2009-09-03 Vladimir Makarov <vmakarov@redhat.com>
PR bootstrap/41241
* ira.c (update_equiv_reg): Remove check on class likely spill.
From-SVN: r151388
Diffstat (limited to 'gcc')
| -rw-r--r-- | gcc/ChangeLog | 5 | ||||
| -rw-r--r-- | gcc/ira.c | 14 |
2 files changed, 6 insertions, 13 deletions
diff --git a/gcc/ChangeLog b/gcc/ChangeLog index 0f5face..fc0ff82 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,3 +1,8 @@ +2009-09-03 Vladimir Makarov <vmakarov@redhat.com> + + PR bootstrap/41241 + * ira.c (update_equiv_reg): Remove check on class likely spill. + 2009-09-03 Jakub Jelinek <jakub@redhat.com> PR debug/41236 @@ -2384,21 +2384,9 @@ update_equiv_regs (void) /* We only handle the case of a pseudo register being set once, or always to the same value. */ - /* ??? The mn10200 port breaks if we add equivalences for - values that need an ADDRESS_REGS register and set them equivalent - to a MEM of a pseudo. The actual problem is in the over-conservative - handling of INPADDR_ADDRESS / INPUT_ADDRESS / INPUT triples in - calculate_needs, but we traditionally work around this problem - here by rejecting equivalences when the destination is in a register - that's likely spilled. This is fragile, of course, since the - preferred class of a pseudo depends on all instructions that set - or use it. */ - if (!REG_P (dest) || (regno = REGNO (dest)) < FIRST_PSEUDO_REGISTER - || reg_equiv[regno].init_insns == const0_rtx - || (CLASS_LIKELY_SPILLED_P (reg_preferred_class (regno)) - && MEM_P (src) && ! reg_equiv[regno].is_arg_equivalence)) + || reg_equiv[regno].init_insns == const0_rtx) { /* This might be setting a SUBREG of a pseudo, a pseudo that is also set somewhere else to a constant. */ |