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author | Hongtao Liu <hongtao.liu@intel.com> | 2019-06-14 15:41:43 +0000 |
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committer | H.J. Lu <hjl@gcc.gnu.org> | 2019-06-14 08:41:43 -0700 |
commit | 66574c5374ecbd358e68d63922927fc03f2f232a (patch) | |
tree | 20a9feee570cc504bf8347e92937e6e4507fa0b9 /gcc | |
parent | 9f119e29269b9a63f36c014b1429e96c133148b4 (diff) | |
download | gcc-66574c5374ecbd358e68d63922927fc03f2f232a.zip gcc-66574c5374ecbd358e68d63922927fc03f2f232a.tar.gz gcc-66574c5374ecbd358e68d63922927fc03f2f232a.tar.bz2 |
i386: Update SSE <-> integer move costs
Since inline_secondary_memory_needed has
/* ??? This is a lie. We do have moves between mmx/general, and for
mmx/sse2. But by saying we need secondary memory we discourage the
register allocator from using the mmx registers unless needed. */
if (MMX_CLASS_P (class1) != MMX_CLASS_P (class2))
return true;
moves between MMX and non-MMX units require secondary memory. There
is no need to check moves between MMX and integer units.
struct processor_costs has:
const int mmxsse_to_integer; /* cost of moving mmxsse register to
integer. */
const int ssemmx_to_integer; /* cost of moving integer to mmxsse register. */
This patch also renames mmxsse_to_integer to sse_to_integer and
ssemmx_to_integer to integer_to_sse.
Tested on Linux/x86-64.
PR target/90877
* config/i386/i386-features.c
(dimode_scalar_chain::compute_convert_gain): Replace
mmxsse_to_integer with sse_to_integer.
* config/i386/i386.c (ix86_register_move_cost): Verify that
moves between MMX and non-MMX units require secondary memory.
Correct costs of moves between SSE and integer units.
* config/i386/i386.h (processor_costs): Rename cost of moving
SSE register to integer to sse_to_integer. Rename cost of
moving integer register to SSE to integer_to_sse.
From-SVN: r272294
Diffstat (limited to 'gcc')
-rw-r--r-- | gcc/ChangeLog | 12 | ||||
-rw-r--r-- | gcc/config/i386/i386-features.c | 2 | ||||
-rw-r--r-- | gcc/config/i386/i386.c | 17 | ||||
-rw-r--r-- | gcc/config/i386/i386.h | 5 |
4 files changed, 25 insertions, 11 deletions
diff --git a/gcc/ChangeLog b/gcc/ChangeLog index f982901..deba760 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,3 +1,15 @@ +2019-06-14 Hongtao Liu <hongtao.liu@intel.com> + + PR target/90877 + * config/i386/i386-features.c + (dimode_scalar_chain::compute_convert_gain): Replace + mmxsse_to_integer with sse_to_integer. + * config/i386/i386.c (ix86_register_move_cost): Verify that + moves between MMX and non-MMX units require secondary memory. + Correct costs of moves between SSE and integer units. + * config/i386/i386.h (processor_costs): Rename cost of moving + SSE register to integer to sse_to_integer. Rename cost of + 2019-06-14 Matt Thomas <matt@3am-software.com> Matthew Green <mrg@eterna.com.au> Nick Hudson <skrll@netbsd.org> diff --git a/gcc/config/i386/i386-features.c b/gcc/config/i386/i386-features.c index 51f88ae..2eac8f7 100644 --- a/gcc/config/i386/i386-features.c +++ b/gcc/config/i386/i386-features.c @@ -554,7 +554,7 @@ dimode_scalar_chain::compute_convert_gain () fprintf (dump_file, " Instruction conversion gain: %d\n", gain); EXECUTE_IF_SET_IN_BITMAP (defs_conv, 0, insn_uid, bi) - cost += DF_REG_DEF_COUNT (insn_uid) * ix86_cost->mmxsse_to_integer; + cost += DF_REG_DEF_COUNT (insn_uid) * ix86_cost->sse_to_integer; if (dump_file) fprintf (dump_file, " Registers conversion cost: %d\n", cost); diff --git a/gcc/config/i386/i386.c b/gcc/config/i386/i386.c index 2eddea5..941e208 100644 --- a/gcc/config/i386/i386.c +++ b/gcc/config/i386/i386.c @@ -18633,18 +18633,21 @@ ix86_register_move_cost (machine_mode mode, reg_class_t class1_i, return cost; } - /* Moves between SSE/MMX and integer unit are expensive. */ - if (MMX_CLASS_P (class1) != MMX_CLASS_P (class2) - || SSE_CLASS_P (class1) != SSE_CLASS_P (class2)) + /* Moves between MMX and non-MMX units require secondary memory. */ + if (MMX_CLASS_P (class1) != MMX_CLASS_P (class2)) + gcc_unreachable (); + + /* Moves between SSE and integer units are expensive. */ + if (SSE_CLASS_P (class1) != SSE_CLASS_P (class2)) /* ??? By keeping returned value relatively high, we limit the number - of moves between integer and MMX/SSE registers for all targets. + of moves between integer and SSE registers for all targets. Additionally, high value prevents problem with x86_modes_tieable_p(), - where integer modes in MMX/SSE registers are not tieable + where integer modes in SSE registers are not tieable because of missing QImode and HImode moves to, from or between MMX/SSE registers. */ - return MAX (8, MMX_CLASS_P (class1) || MMX_CLASS_P (class2) - ? ix86_cost->mmxsse_to_integer : ix86_cost->ssemmx_to_integer); + return MAX (8, SSE_CLASS_P (class1) + ? ix86_cost->sse_to_integer : ix86_cost->integer_to_sse); if (MAYBE_FLOAT_CLASS_P (class1)) return ix86_cost->fp_move; diff --git a/gcc/config/i386/i386.h b/gcc/config/i386/i386.h index 01213cc..0ac5d65 100644 --- a/gcc/config/i386/i386.h +++ b/gcc/config/i386/i386.h @@ -276,9 +276,8 @@ struct processor_costs { const int sse_store[5]; /* cost of storing SSE register in SImode, DImode and TImode. */ const int sse_unaligned_store[5];/* cost of unaligned store. */ - const int mmxsse_to_integer; /* cost of moving mmxsse register to - integer. */ - const int ssemmx_to_integer; /* cost of moving integer to mmxsse register. */ + const int sse_to_integer; /* cost of moving SSE register to integer. */ + const int integer_to_sse; /* cost of moving integer register to SSE. */ const int gather_static, gather_per_elt; /* Cost of gather load is computed as static + per_item * nelts. */ const int scatter_static, scatter_per_elt; /* Cost of gather store is |