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| author | Andrew Bennett <andrew.bennett@imgtec.com> | 2015-08-28 13:35:01 +0000 |
|---|---|---|
| committer | Andrew Bennett <abennett@gcc.gnu.org> | 2015-08-28 13:35:01 +0000 |
| commit | 51fcc5132137b96c322c9803f84ed934e352cd5f (patch) | |
| tree | 8ff1448ff441267bb613a23c8161b6ff18297c78 /gcc | |
| parent | 3726332a0b6390397382a441f4c25723ac1b39a7 (diff) | |
| download | gcc-51fcc5132137b96c322c9803f84ed934e352cd5f.zip gcc-51fcc5132137b96c322c9803f84ed934e352cd5f.tar.gz gcc-51fcc5132137b96c322c9803f84ed934e352cd5f.tar.bz2 | |
MIPS: Add the lo register to the clobber list in the madd-8.c and msub-8.c testcases.
The lo register is not listed in the clobber list in the inline asm statement
for the madd-8.c and msub-8.c testcases. This means that when building for the
n64 ABI GCC is free to use the lo register instead of the stack when
saving/restoring the clobbered registers. Then then means that it decides to
use the msub/madd instruction to perform the "x - y * z" operation rather than
using mul; addu/subu which the test is looking for.
testsuite/
* gcc.target/mips/madd-8.c: Add lo register to clobber list.
* gcc.target/mips/msub-8.c: Ditto.
From-SVN: r227299
Diffstat (limited to 'gcc')
| -rw-r--r-- | gcc/testsuite/ChangeLog | 5 | ||||
| -rw-r--r-- | gcc/testsuite/gcc.target/mips/madd-8.c | 2 | ||||
| -rw-r--r-- | gcc/testsuite/gcc.target/mips/msub-8.c | 2 |
3 files changed, 7 insertions, 2 deletions
diff --git a/gcc/testsuite/ChangeLog b/gcc/testsuite/ChangeLog index 93e1384..a6f1ce8 100644 --- a/gcc/testsuite/ChangeLog +++ b/gcc/testsuite/ChangeLog @@ -1,3 +1,8 @@ +2015-08-28 Andrew Bennett <andrew.bennett@imgtec.com> + + * gcc.target/mips/madd-8.c: Add lo register to clobber list. + * gcc.target/mips/msub-8.c: Ditto + 2015-08-27 Bill Schmidt <wschmidt@linux.vnet.ibm.com> * lib/target-supports.exp (check-effective_target_vect_double): diff --git a/gcc/testsuite/gcc.target/mips/madd-8.c b/gcc/testsuite/gcc.target/mips/madd-8.c index 794a6ff..56c1947 100644 --- a/gcc/testsuite/gcc.target/mips/madd-8.c +++ b/gcc/testsuite/gcc.target/mips/madd-8.c @@ -11,6 +11,6 @@ f2 (int x, int y, int z) asm volatile ("" ::: "$1", "$2", "$3", "$4", "$5", "$6", "$7", "$8", "$9", "$10", "$11", "$12", "$13", "$14", "$15", "$16", "$17", "$18", "$19", "$20", "$21", "$22", "$23", "$24", "$25", - "$31"); + "$31", "lo"); return x * y + z; } diff --git a/gcc/testsuite/gcc.target/mips/msub-8.c b/gcc/testsuite/gcc.target/mips/msub-8.c index a66307f..b0f1523 100644 --- a/gcc/testsuite/gcc.target/mips/msub-8.c +++ b/gcc/testsuite/gcc.target/mips/msub-8.c @@ -11,6 +11,6 @@ f2 (int x, int y, int z) asm volatile ("" ::: "$1", "$2", "$3", "$4", "$5", "$6", "$7", "$8", "$9", "$10", "$11", "$12", "$13", "$14", "$15", "$16", "$17", "$18", "$19", "$20", "$21", "$22", "$23", "$24", "$25", - "$31"); + "$31", "lo"); return x - y * z; } |