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| author | Jeffrey A Law <law@cygnus.com> | 2001-11-09 20:00:50 +0000 |
|---|---|---|
| committer | Jeff Law <law@gcc.gnu.org> | 2001-11-09 13:00:50 -0700 |
| commit | 512672fd5a9b0eeaad27a0bee011fdf7b48841ea (patch) | |
| tree | be3e69a697c104c7cb5752edea70fbe585d9b6c8 /gcc | |
| parent | beda04276f74706581b73c2d3ac63f300868391b (diff) | |
| download | gcc-512672fd5a9b0eeaad27a0bee011fdf7b48841ea.zip gcc-512672fd5a9b0eeaad27a0bee011fdf7b48841ea.tar.gz gcc-512672fd5a9b0eeaad27a0bee011fdf7b48841ea.tar.bz2 | |
pa.md (mulsi3): Remove PA64 hack to work around SUBREG issues.
* pa.md (mulsi3): Remove PA64 hack to work around SUBREG issues.
(muldi3): Update due to SUBREG_BYTE changes.
(casesi): Similarly.
From-SVN: r46889
Diffstat (limited to 'gcc')
| -rw-r--r-- | gcc/ChangeLog | 6 | ||||
| -rw-r--r-- | gcc/config/pa/pa.md | 20 |
2 files changed, 11 insertions, 15 deletions
diff --git a/gcc/ChangeLog b/gcc/ChangeLog index 1136b85..7353581 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,3 +1,9 @@ +Fri Nov 9 11:27:42 2001 Jeffrey A Law (law@cygnus.com) + + * pa.md (mulsi3): Remove PA64 hack to work around SUBREG issues. + (muldi3): Update due to SUBREG_BYTE changes. + (casesi): Similarly. + 2001-11-09 Zack Weinberg <zack@codesourcery.com> * doc/invoke.texi: Remove comment referring to -xf77-version. diff --git a/gcc/config/pa/pa.md b/gcc/config/pa/pa.md index 626d92a..f375720 100644 --- a/gcc/config/pa/pa.md +++ b/gcc/config/pa/pa.md @@ -3881,16 +3881,6 @@ operands[1] = force_reg (SImode, operands[1]); operands[2] = force_reg (SImode, operands[2]); emit_insn (gen_umulsidi3 (scratch, operands[1], operands[2])); - /* We do not want (subreg:SI (XX:DI) 1)) for TARGET_64BIT since - that has no real meaning. */ - if (TARGET_64BIT) - { - emit_insn (gen_rtx_SET (VOIDmode, - operands[0], - gen_rtx_SUBREG (SImode, scratch, 0))); - DONE; - - } emit_insn (gen_rtx_SET (VOIDmode, operands[0], gen_rtx_SUBREG (SImode, scratch, GET_MODE_SIZE (SImode)))); DONE; @@ -3993,10 +3983,10 @@ GEN_INT (32))); emit_move_insn (op2shifted, gen_rtx_LSHIFTRT (DImode, operands[2], GEN_INT (32))); - op1r = gen_rtx_SUBREG (SImode, operands[1], 0); - op2r = gen_rtx_SUBREG (SImode, operands[2], 0); - op1l = gen_rtx_SUBREG (SImode, op1shifted, 0); - op2l = gen_rtx_SUBREG (SImode, op2shifted, 0); + op1r = gen_rtx_SUBREG (SImode, operands[1], 4); + op2r = gen_rtx_SUBREG (SImode, operands[2], 4); + op1l = gen_rtx_SUBREG (SImode, op1shifted, 4); + op2l = gen_rtx_SUBREG (SImode, op2shifted, 4); /* Emit multiplies for the cross products. */ emit_insn (gen_umulsidi3 (cross_product1, op2r, op1l)); @@ -5774,7 +5764,7 @@ { rtx reg = gen_reg_rtx (DImode); emit_insn (gen_extendsidi2 (reg, operands[0])); - operands[0] = gen_rtx_SUBREG (SImode, reg, 0); + operands[0] = gen_rtx_SUBREG (SImode, reg, 4); } if (!INT_5_BITS (operands[2])) |