linux.h: Add #undef for SUBTARGET_CPP_SPEC.

2002-07-03  Eric Christopher  <echristo@redhat.com>

	* config/mips/linux.h: Add #undef for SUBTARGET_CPP_SPEC.
	* config/mips/mips.h: Remove deprecated -m<processor> options
	and cc1_cpu_spec associated.
	(CONSTANT_ADDRESS_P): Fix last patch.
	(ASM_DECLARE_FUNCTION_NAME): Declare. Fix comment.
	* config/mips/mips.md (bungt, bunge, sungt_df, sungt_sf, sunge_df,
	sunge_sf): Remove.

From-SVN: r55233

4 files changed, 29 insertions, 112 deletions

diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index 328ea9f..b3d7c09 100644
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,3 +1,13 @@
+2002-07-03  Eric Christopher  <echristo@redhat.com>
+
+	* config/mips/linux.h: Add #undef for SUBTARGET_CPP_SPEC.
+	* config/mips/mips.h: Remove deprecated -m<processor> options
+	and cc1_cpu_spec associated.
+	(CONSTANT_ADDRESS_P): Fix last patch.
+	(ASM_DECLARE_FUNCTION_NAME): Declare. Fix comment.
+	* config/mips/mips.md (bungt, bunge, sungt_df, sungt_sf, sunge_df,
+	sunge_sf): Remove.
+
 2002-07-03  Stan Shebs  <shebs@apple.com>
 
 	* config/darwin.h (APPLE_CC): Remove, not meaningful in FSF GCC.
@@ -100,7 +110,7 @@ Wed Jul  3 10:24:16 2002  J"orn Rennecke <joern.rennecke@superh.com>
 	* cpptrad.c: Update comment.
 
 2002-07-02  Neil Booth  <neil@daikokuya.co.uk>
-	
+
 	* doc/cpp.texi: Update for traditional preprocessing changes.
 	* goc/cppopts.texi: Similarly.
 
@@ -118,7 +128,7 @@ Tue Jul  2 18:45:45 2002  J"orn Rennecke <joern.rennecke@superh.com>
 	* sh.c (print_operand, case 'N'): Allow zero vector.
 	(arith_reg_or_0_operand): Likewise.
 	(zero_vec_operand): Check for CONST_VECTOR, not PARALLEL.
-	* sh.h (CONST_COSTS): 0 has 0 cost.  Check OUTER_CODE for 
+	* sh.h (CONST_COSTS): 0 has 0 cost.  Check OUTER_CODE for
 	IOR, XOR, PLUS and SET and take their respective constant
 	ranges into account.
 	(PREDICATE_CODES, arith_reg_or_0_operand): Can be CONST_VECTOR.
@@ -290,7 +300,7 @@ Fri Jun 28 17:22:37 2002  Denis Chertykov  <denisc@overta.ru>
 			  Alan Lehotsky <apl@alum.mit.edu>
 			  Bernd Schmidt  <bernds@redhat.com>
 			  Graham Stott  <grahams@redhat.com>
-			  
+
 	* doc/extend.texi: Add ip2k port to description of attribute
 	naked.
 	* doc/install.texi (Specific): Add ip2k description.
@@ -411,7 +421,7 @@ Fri Jun 28 17:22:37 2002  Denis Chertykov  <denisc@overta.ru>
 	* config/m68hc11/m68hc11.md ("*addsi3"): Use 'o' constraint to
 	avoid the auto increment addressing modes.
 	("*subsi3"): Likewise.
-	(split for add/sub on address): For 68HC12 push the value on 
+	(split for add/sub on address): For 68HC12 push the value on
 	the stack and do the operation with a pop.
 
 2002-06-28  Neil Booth  <neil@daikokuya.co.uk>
@@ -512,7 +522,7 @@ Fri Jun 28 17:22:37 2002  Denis Chertykov  <denisc@overta.ru>
 2002-06-27  Daniel Berlin  <dberlin@dberlin.org>
 
 	* gcse.c (hoist_code): Rewrite to only get list of dominated
-	blocks once per BB. Also fix reversed test (by removing need for 
+	blocks once per BB. Also fix reversed test (by removing need for
 	the test at all).
 
 2002-06-27  Neil Booth  <neil@daikokuya.co.uk>
@@ -587,7 +597,7 @@ Tue Jun 25 21:51:13 2002  J"orn Rennecke <joern.rennecke@superh.com>
 	* optabs.c (expand_vector_binop, expand_vector_unop): Don't assume
 	GET_MODE_UNIT_SIZE (mode) == UNITS_PER_WORD.
 
-	* config/sh/lib1funcs.asm (udivdi3): Make first divide step 
+	* config/sh/lib1funcs.asm (udivdi3): Make first divide step
 	produce a 32 bit result before normalization, then normalize with a
 	left shift.  Compute approximative error of 2nd reciprocal
 	approximation in 2's complement.  Fix mask generation from upper
@@ -644,7 +654,7 @@ Mon Jun 24 21:05:09 2002  J"orn Rennecke <joern.rennecke@superh.com>
 
 	* doc/extend.texi: Change `@dots{}' to `/* @r{@dots{}} */'
 	in examples.
-	
+
 2002-06-24  Art Haas  <ahaas@neosoft.com>
 
 	* doc/extend.texi (Other Builtins): Change `...' to `@dots{}'.
@@ -1010,7 +1020,7 @@ Thu Jun 20 12:14:01 CEST 2002  Jan Hubicka  <jh@suse.cz>
 	* i386.md (xorqi_1_slp, xorqi_2_slp): New patterns.
 
 2002-06-16  Aldy Hernandez  <aldyh@redhat.com>
-	
+
 	* gcc.c-torture/execute/simd-1.c: New.
 
 	* gcc.dg/simd-1.c: New.
@@ -1040,7 +1050,7 @@ Thu Jun 20 12:14:01 CEST 2002  Jan Hubicka  <jh@suse.cz>
 	(expand_unop): Open-code vector unops.
 	(expand_vector_binop): New.
 	(expand_vector_unop): New.
-	
+
 	* c-typeck.c (build_binary_op): Allow vectors in binops.
 	Allow vectors in conditional operatiors.
 	(build_unary_op): Allow vectors in unary minus.
diff --git a/gcc/config/mips/linux.h b/gcc/config/mips/linux.h
index 1c0a996..ca04bf6 100644
--- a/gcc/config/mips/linux.h
+++ b/gcc/config/mips/linux.h
@@ -171,6 +171,7 @@ void FN ()							\
         builtin_define ("_MIPS_SZINT=32");			\
 } while (0)
 
+#undef  SUBTARGET_CPP_SPEC
 #define SUBTARGET_CPP_SPEC "\
 %{fno-PIC:-U__PIC__ -U__pic__} %{fno-pic:-U__PIC__ -U__pic__} \
 %{fPIC:-D__PIC__ -D__pic__} %{fpic:-D__PIC__ -D__pic__} \
diff --git a/gcc/config/mips/mips.h b/gcc/config/mips/mips.h
index 301f7ca..0d551bc 100644
--- a/gcc/config/mips/mips.h
+++ b/gcc/config/mips/mips.h
@@ -561,10 +561,6 @@ extern void		sbss_section PARAMS ((void));
      N_("Work around early 4300 hardware bug")},			\
   {"no-fix4300",         -MASK_4300_MUL_FIX,				\
      N_("Don't work around early 4300 hardware bug")},			\
-  {"3900",		  0,				                \
-     N_("Optimize for 3900")},						\
-  {"4650",		  0,                    			\
-     N_("Optimize for 4650")},						\
   {"check-zero-division",-MASK_NO_CHECK_ZERO_DIV,			\
      N_("Trap on integer divide by zero")},				\
   {"no-check-zero-division", MASK_NO_CHECK_ZERO_DIV,			\
@@ -1044,16 +1040,6 @@ extern int mips_abi;
 #define SUBTARGET_CC1_SPEC ""
 #endif
 
-/* Deal with historic options.  */
-#ifndef CC1_CPU_SPEC
-#define CC1_CPU_SPEC "\
-%{!mcpu*: \
-%{m3900:-march=r3900 -mips1 -mfp32 -mgp32 \
-%n`-m3900' is deprecated. Use `-march=r3900' instead.\n} \
-%{m4650:-march=r4650 -mmad -msingle-float \
-%n`-m4650' is deprecated. Use `-march=r4650' instead.\n}}"
-#endif
-
 /* CC1_SPEC is the set of arguments to pass to the compiler proper.  */
 /* Note, we will need to adjust the following if we ever find a MIPS variant
    that has 32-bit GPRs and 64-bit FPRs as well as fix all of the reload bugs
@@ -1073,8 +1059,7 @@ extern int mips_abi;
 %{mgp32: %{mfp64:%emay not use both -mgp32 and -mfp64} %{!mfp32: -mfp32}} \
 %{G*} %{EB:-meb} %{EL:-mel} %{EB:%{EL:%emay not use both -EB and -EL}} \
 %{save-temps: } \
-%(subtarget_cc1_spec) \
-%(cc1_cpu_spec)"
+%(subtarget_cc1_spec)"
 #endif
 
 /* Preprocessor specs.  */
@@ -1099,7 +1084,6 @@ extern int mips_abi;
 
 #define EXTRA_SPECS							\
   { "subtarget_cc1_spec", SUBTARGET_CC1_SPEC },				\
-  { "cc1_cpu_spec", CC1_CPU_SPEC},                                      \
   { "subtarget_cpp_spec", SUBTARGET_CPP_SPEC },				\
   { "mips_as_asm_spec", MIPS_AS_ASM_SPEC },				\
   { "gas_asm_spec", GAS_ASM_SPEC },					\
@@ -2989,9 +2973,10 @@ typedef struct mips_args {
     || GET_CODE (X) == CONST_INT || GET_CODE (X) == HIGH		\
     || (GET_CODE (X) == CONST						\
 	&& ! (flag_pic && pic_address_needs_scratch (X))		\
-	&& (!TARGET_GAS)						\
-	&& (mips_abi == ABI_N32						\
-	    || mips_abi == ABI_64)))
+	&& (TARGET_GAS)							\
+	&& (mips_abi != ABI_N32 					\
+	    && mips_abi != ABI_64)))
+
 
 /* Define this, so that when PIC, reload won't try to reload invalid
    addresses which require two reload registers.  */
@@ -4275,11 +4260,12 @@ do {							\
 /* This is how to declare a function name.  The actual work of
    emitting the label is moved to function_prologue, so that we can
    get the line number correctly emitted before the .ent directive,
-   and after any .file directives.  */
-/*
+   and after any .file directives.  Define to NULL so that the function
+   is not declared before the .ent directive elsewhere.  */
+
 #undef ASM_DECLARE_FUNCTION_NAME
 #define ASM_DECLARE_FUNCTION_NAME(STREAM,NAME,DECL)
-*/
+
 
 /* This is how to output an internal numbered label where
    PREFIX is the class of label and NUM is the number within the class.  */
diff --git a/gcc/config/mips/mips.md b/gcc/config/mips/mips.md
index b804f33..46c6737 100644
--- a/gcc/config/mips/mips.md
+++ b/gcc/config/mips/mips.md
@@ -8095,22 +8095,6 @@ move\\t%0,%z4\\n\\
      }
 }")
 
-(define_expand "bungt"
-  [(set (pc)
-	(if_then_else (ungt:CC (cc0)
-			       (const_int 0))
-		      (label_ref (match_operand 0 "" ""))
-		      (pc)))]
-  ""
-  "
-{
-  if (operands[0])		/* avoid unused code warning */
-     {
-	gen_conditional_branch (operands, UNGT);
-	DONE;
-     }
-}")
-
 (define_expand "bunlt"
   [(set (pc)
 	(if_then_else (unlt:CC (cc0)
@@ -8143,22 +8127,6 @@ move\\t%0,%z4\\n\\
      }
 }")
 
-(define_expand "bunge"
-  [(set (pc)
-	(if_then_else (unge:CC (cc0)
-			       (const_int 0))
-		      (label_ref (match_operand 0 "" ""))
-		      (pc)))]
-  ""
-  "
-{
-  if (operands[0])		/* avoid unused code warning */
-     {
-	gen_conditional_branch (operands, UNGE);
-	DONE;
-     }
-}")
-
 (define_expand "bunle"
   [(set (pc)
 	(if_then_else (unle:CC (cc0)
@@ -9255,18 +9223,6 @@ move\\t%0,%z4\\n\\
  [(set_attr "type"      "fcmp")
   (set_attr "mode"      "FPSW")])
 
-(define_insn "sungt_df"
-  [(set (match_operand:CC 0 "register_operand" "=z")
-	(ungt:CC (match_operand:DF 1 "register_operand" "f")
-		 (match_operand:DF 2 "register_operand" "f")))]
-  "TARGET_HARD_FLOAT && TARGET_DOUBLE_FLOAT"
-  "*
-{
- return mips_fill_delay_slot (\"c.ugt.d\\t%Z0%1,%2\", DELAY_FCMP, operands, insn);
-}"
- [(set_attr "type"      "fcmp")
-  (set_attr "mode"      "FPSW")])
-
 (define_insn "sunlt_df"
   [(set (match_operand:CC 0 "register_operand" "=z")
 	(unlt:CC (match_operand:DF 1 "register_operand" "f")
@@ -9291,18 +9247,6 @@ move\\t%0,%z4\\n\\
  [(set_attr "type"      "fcmp")
   (set_attr "mode"      "FPSW")])
 
-(define_insn "sunge_df"
-  [(set (match_operand:CC 0 "register_operand" "=z")
-	(unge:CC (match_operand:DF 1 "register_operand" "f")
-		 (match_operand:DF 2 "register_operand" "f")))]
-  "TARGET_HARD_FLOAT && TARGET_DOUBLE_FLOAT"
-  "*
-{
- return mips_fill_delay_slot (\"c.uge.d\\t%Z0%1,%2\", DELAY_FCMP, operands, insn);
-}"
- [(set_attr "type"      "fcmp")
-  (set_attr "mode"      "FPSW")])
-
 (define_insn "sunle_df"
   [(set (match_operand:CC 0 "register_operand" "=z")
 	(unle:CC (match_operand:DF 1 "register_operand" "f")
@@ -9399,18 +9343,6 @@ move\\t%0,%z4\\n\\
  [(set_attr "type"	"fcmp")
   (set_attr "mode"	"FPSW")])
 
-(define_insn "sungt_sf"
-  [(set (match_operand:CC 0 "register_operand" "=z")
-	(ungt:CC (match_operand:SF 1 "register_operand" "f")
-		 (match_operand:SF 2 "register_operand" "f")))]
-  "TARGET_HARD_FLOAT && TARGET_DOUBLE_FLOAT"
-  "*
-{
- return mips_fill_delay_slot (\"c.ugt.s\\t%Z0%1,%2\", DELAY_FCMP, operands, insn);
-}"
- [(set_attr "type"      "fcmp")
-  (set_attr "mode"      "FPSW")])
-
 (define_insn "sunlt_sf"
   [(set (match_operand:CC 0 "register_operand" "=z")
 	(unlt:CC (match_operand:SF 1 "register_operand" "f")
@@ -9435,18 +9367,6 @@ move\\t%0,%z4\\n\\
  [(set_attr "type"      "fcmp")
   (set_attr "mode"      "FPSW")])
 
-(define_insn "sunge_sf"
-  [(set (match_operand:CC 0 "register_operand" "=z")
-	(unge:CC (match_operand:SF 1 "register_operand" "f")
-		 (match_operand:SF 2 "register_operand" "f")))]
-  "TARGET_HARD_FLOAT && TARGET_DOUBLE_FLOAT"
-  "*
-{
- return mips_fill_delay_slot (\"c.uge.s\\t%Z0%1,%2\", DELAY_FCMP, operands, insn);
-}"
- [(set_attr "type"      "fcmp")
-  (set_attr "mode"      "FPSW")])
-
 (define_insn "sunle_sf"
   [(set (match_operand:CC 0 "register_operand" "=z")
 	(unle:CC (match_operand:SF 1 "register_operand" "f")