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author | Monk Chiang <sh.chiang04@gmail.com> | 2019-02-10 09:09:19 +0000 |
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committer | Chung-Ju Wu <jasonwucj@gcc.gnu.org> | 2019-02-10 09:09:19 +0000 |
commit | 4b23af6dae69976a50c038f44b335db96c1a286a (patch) | |
tree | 2c9fccfcf5df5ae4f03c8bdc6481b9cdb1b99642 /gcc | |
parent | 93c75052c4b6b3754d9f868f849645ab5f7a0de2 (diff) | |
download | gcc-4b23af6dae69976a50c038f44b335db96c1a286a.zip gcc-4b23af6dae69976a50c038f44b335db96c1a286a.tar.gz gcc-4b23af6dae69976a50c038f44b335db96c1a286a.tar.bz2 |
[NDS32] Refine register dwarf span.
gcc/
* config/nds32/nds32.c (nds32_dwarf_register_span): Refine register
dwarf span.
From-SVN: r268739
Diffstat (limited to 'gcc')
-rw-r--r-- | gcc/ChangeLog | 5 | ||||
-rw-r--r-- | gcc/config/nds32/nds32.c | 6 |
2 files changed, 7 insertions, 4 deletions
diff --git a/gcc/ChangeLog b/gcc/ChangeLog index 4418335..5c415d8 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,3 +1,8 @@ +2019-02-10 Monk Chiang <sh.chiang04@gmail.com> + + * config/nds32/nds32.c (nds32_dwarf_register_span): Refine register + dwarf span. + 2019-02-10 Chung-Ju Wu <jasonwucj@gmail.com> * config/nds32/nds32-md-auxiliary.c (nds32_spilt_doubleword): Support diff --git a/gcc/config/nds32/nds32.c b/gcc/config/nds32/nds32.c index 6702b76..283e189 100644 --- a/gcc/config/nds32/nds32.c +++ b/gcc/config/nds32/nds32.c @@ -3867,11 +3867,9 @@ nds32_dwarf_register_span (rtx reg) gen_rtvec (4, dwarf_low_re, dwarf_high_re, dwarf_high_im, dwarf_low_im)); } - else if (mode == SFmode || mode == SImode) + else if (GET_MODE_SIZE (mode) <= UNITS_PER_WORD) { - /* Create new dwarf information with adjusted register number. */ - dwarf_single = gen_rtx_REG (word_mode, regno); - return gen_rtx_PARALLEL (VOIDmode, gen_rtvec (1, dwarf_single)); + return NULL_RTX; } else { |