Replace recog_foo with recog_data.foo.

From-SVN: r29349

25 files changed, 539 insertions, 497 deletions

diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index 16f2ca6..2b3426a 100644
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,3 +1,40 @@
+Sat Sep 11 18:37:04 1999  Richard Henderson  <rth@cygnus.com>
+
+	* recog.h (struct recog_data, recog_data): New.
+	(recog_foo variables): Kill.
+	* recog.c (recog_operand, recog_operand_loc): Kill.
+	(recog_dup_loc, recog_dup_num, recog_n_operands): Kill.
+	(recog_n_dups, recog_n_alternatives, recog_operand_mode): Kill.
+	(recog_constraints, recog_op_type, recog_operand_address_p): Kill.
+	(recog_data): Define.
+	(extract_insn): Update all recog_foo references to use recog_data.
+	(preprocess_constraints, constrain_operands): Likewise.
+	* final.c (final_scan_insn, cleanup_subreg_operands): Likewise.
+	* genattrtab.c (main): Likewise.
+	* genextract.c (main): Likewise.
+	* genoutput.c: Likewise.
+	* genrecog.c (write_subroutine, main): Likewise.
+	* local-alloc.c (block_alloc): Likewise.
+	* reg-stack.c (record_asm_reg_life, subst_asm_stack_regs): Likewise.
+	* regclass.c (scan_one_insn, record_reg_classes): Likewise.
+	* regmove.c (regmove_optimize, find_matches, fixup_match_1): Likewise.
+	* reload.c (find_reloads, find_reloads_toplev): Likewise.
+	* reload1.c (maybe_fix_stack_asms, eliminate_regs_in_insn): Likewise.
+	(reload_cse_simplify_operands): Likewise.
+
+	* arc/arc.c (arc_final_prescan_insn): Likewise.
+	* arm/arm.c (note_invalid_constants, arm_final_prescan_insn): Likewise.
+	* h8300/h8300.c (notice_update_cc): Likewise.
+	* i386/i386.c (ix86_attr_length_default, ix86_agi_dependant): Likewise.
+	* i860/i860.c (output_delayed_branch, output_delay_insn): Likewise.
+	* mn10200/mn10200.c (notice_update_cc): Likewise.
+	* mn10300/mn10300.c (notice_update_cc): Likewise.
+	* romp/romp.c (update_cc): Likewise.
+	* sparc/sparc.c (check_pic): Likewise.
+	* v850/v850.c (notice_update_cc): Likewise.
+
+	* genemit.c (main): Don't declare recog_operand.
+
 Sat Sep 11 12:41:55 1999  Alex Samuel  <samuel@codesourcery.com>
 
 	* ggc.h (rtvec_def): Forward declare.
diff --git a/gcc/config/arc/arc.c b/gcc/config/arc/arc.c
index c5638f1..372ba04 100644
--- a/gcc/config/arc/arc.c
+++ b/gcc/config/arc/arc.c
@@ -2152,7 +2152,7 @@ arc_final_prescan_insn (insn, opvec, noperands)
 	    arc_ccfsm_current_cc = ARC_INVERSE_CONDITION_CODE (arc_ccfsm_current_cc);
 	}
 
-      /* Restore recog_operand.  Getting the attributes of other insns can
+      /* Restore recog_data.  Getting the attributes of other insns can
 	 destroy this array, but final.c assumes that it remains intact
 	 across this call; since the insn has been recognized already we
 	 call insn_extract direct. */
diff --git a/gcc/config/arm/arm.c b/gcc/config/arm/arm.c
index 4ea3c05..4233107 100644
--- a/gcc/config/arm/arm.c
+++ b/gcc/config/arm/arm.c
@@ -4258,7 +4258,7 @@ note_invalid_constants (insn, address)
   /* Preprocess the constraints, to extract some useful information.  */
   preprocess_constraints ();
 
-  for (opno = 0; opno < recog_n_operands; opno++)
+  for (opno = 0; opno < recog_data.n_operands; opno++)
     {
       /* Things we need to fix can only occur in inputs */
       if (recog_op_type[opno] != OP_IN)
@@ -4270,22 +4270,23 @@ note_invalid_constants (insn, address)
 	 now so that we output the right code.  */
       if (recog_op_alt[opno][which_alternative].memory_ok)
 	{
-	  rtx op = recog_operand[opno];
+	  rtx op = recog_data.operand[opno];
 
 	  if (CONSTANT_P (op))
-	    push_minipool_fix (insn, address, recog_operand_loc[opno],
-			       recog_operand_mode[opno], op);
+	    push_minipool_fix (insn, address, recog_data.operand_loc[opno],
+			       recog_data.operand_mode[opno], op);
 #ifndef AOF_ASSEMBLER
 	  else if (GET_CODE (op) == UNSPEC && XINT (op, 1) == 3)
-	    push_minipool_fix (insn, address, recog_operand_loc[opno],
-			       recog_operand_mode[opno], XVECEXP (op, 0, 0));
+	    push_minipool_fix (insn, address, recog_data.operand_loc[opno],
+			       recog_data.operand_mode[opno],
+			       XVECEXP (op, 0, 0));
 #endif
-	  else if (recog_operand_mode[opno] == SImode
+	  else if (recog_data.operand_mode[opno] == SImode
 		   && GET_CODE (op) == MEM
 		   && GET_CODE (XEXP (op, 0)) == SYMBOL_REF
 		   && CONSTANT_POOL_ADDRESS_P (XEXP (op, 0)))
-	    push_minipool_fix (insn, address, recog_operand_loc[opno],
-			       recog_operand_mode[opno],
+	    push_minipool_fix (insn, address, recog_data.operand_loc[opno],
+			       recog_data.operand_mode[opno],
 			       get_pool_constant (XEXP (op, 0)));
 	}
     }
@@ -6711,7 +6712,8 @@ arm_final_prescan_insn (insn)
 	  if (reverse || then_not_else)
 	    arm_current_cc = ARM_INVERSE_CONDITION_CODE (arm_current_cc);
 	}
-      /* restore recog_operand (getting the attributes of other insns can
+
+      /* Restore recog_data (getting the attributes of other insns can
 	 destroy this array, but final.c assumes that it remains intact
 	 across this call; since the insn has been recognized already we
 	 call recog direct). */
diff --git a/gcc/config/h8300/h8300.c b/gcc/config/h8300/h8300.c
index aa58157..8710e23 100644
--- a/gcc/config/h8300/h8300.c
+++ b/gcc/config/h8300/h8300.c
@@ -1607,26 +1607,26 @@ notice_update_cc (body, insn)
     case CC_NONE_0HIT:
       /* Insn does not change CC, but the 0'th operand has been changed.  */
       if (cc_status.value1 != 0
-	  && reg_overlap_mentioned_p (recog_operand[0], cc_status.value1))
+	  && reg_overlap_mentioned_p (recog_data.operand[0], cc_status.value1))
 	cc_status.value1 = 0;
       break;
 
     case CC_SET_ZN:
-      /* Insn sets the Z,N flags of CC to recog_operand[0].
+      /* Insn sets the Z,N flags of CC to recog_data.operand[0].
 	 The V flag is unusable.  The C flag may or may not be known but
 	 that's ok because alter_cond will change tests to use EQ/NE.  */
       CC_STATUS_INIT;
       cc_status.flags |= CC_OVERFLOW_UNUSABLE | CC_NO_CARRY;
-      cc_status.value1 = recog_operand[0];
+      cc_status.value1 = recog_data.operand[0];
       break;
 
     case CC_SET_ZNV:
-      /* Insn sets the Z,N,V flags of CC to recog_operand[0].
+      /* Insn sets the Z,N,V flags of CC to recog_data.operand[0].
 	 The C flag may or may not be known but that's ok because
 	 alter_cond will change tests to use EQ/NE.  */
       CC_STATUS_INIT;
       cc_status.flags |= CC_NO_CARRY;
-      cc_status.value1 = recog_operand[0];
+      cc_status.value1 = recog_data.operand[0];
       break;
 
     case CC_COMPARE:
diff --git a/gcc/config/i386/i386.c b/gcc/config/i386/i386.c
index 5176c92b..38ef20e 100644
--- a/gcc/config/i386/i386.c
+++ b/gcc/config/i386/i386.c
@@ -5103,29 +5103,29 @@ ix86_attr_length_default (insn)
     case TYPE_IDIV:
     case TYPE_PUSH:
     case TYPE_POP:
-      for (i = recog_n_operands - 1; i >= 0; --i)
-        if (CONSTANT_P (recog_operand[i]))
+      for (i = recog_data.n_operands - 1; i >= 0; --i)
+        if (CONSTANT_P (recog_data.operand[i]))
 	  {
-	    if (GET_CODE (recog_operand[i]) == CONST_INT
-		&& CONST_OK_FOR_LETTER_P (INTVAL (recog_operand[i]), 'K'))
+	    if (GET_CODE (recog_data.operand[i]) == CONST_INT
+		&& CONST_OK_FOR_LETTER_P (INTVAL (recog_data.operand[i]), 'K'))
 	      len += 1;
 	    else
-	      len += GET_MODE_SIZE (GET_MODE (recog_operand[0]));
+	      len += GET_MODE_SIZE (GET_MODE (recog_data.operand[0]));
 	  }
       break;
 
     case TYPE_IMOV:
-      if (CONSTANT_P (recog_operand[1]))
-        len += GET_MODE_SIZE (GET_MODE (recog_operand[0]));
+      if (CONSTANT_P (recog_data.operand[1]))
+        len += GET_MODE_SIZE (GET_MODE (recog_data.operand[0]));
       break;
 
     case TYPE_CALL:
-      if (constant_call_address_operand (recog_operand[0]))
+      if (constant_call_address_operand (recog_data.operand[0]))
 	return 5;
       break;
 
     case TYPE_CALLV:
-      if (constant_call_address_operand (recog_operand[1]))
+      if (constant_call_address_operand (recog_data.operand[1]))
 	return 5;
       break;
 
@@ -5138,19 +5138,19 @@ ix86_attr_length_default (insn)
       return 15;
 
     case TYPE_FXCH:
-      if (STACK_TOP_P (recog_operand[0]))
-	return 2 + (REGNO (recog_operand[1]) != FIRST_STACK_REG + 1);
+      if (STACK_TOP_P (recog_data.operand[0]))
+	return 2 + (REGNO (recog_data.operand[1]) != FIRST_STACK_REG + 1);
       else
-	return 2 + (REGNO (recog_operand[0]) != FIRST_STACK_REG + 1);
+	return 2 + (REGNO (recog_data.operand[0]) != FIRST_STACK_REG + 1);
 
     default:
       abort ();
     }
 
-  for (i = recog_n_operands - 1; i >= 0; --i)
-    if (GET_CODE (recog_operand[i]) == MEM)
+  for (i = recog_data.n_operands - 1; i >= 0; --i)
+    if (GET_CODE (recog_data.operand[i]) == MEM)
       {
-	len += memory_address_length (XEXP (recog_operand[i], 0));
+	len += memory_address_length (XEXP (recog_data.operand[i], 0));
 	break;
       }
 
@@ -5239,10 +5239,10 @@ ix86_agi_dependant (insn, dep_insn, insn_type)
     {
       int i;
       extract_insn (insn);
-      for (i = recog_n_operands - 1; i >= 0; --i)
-	if (GET_CODE (recog_operand[i]) == MEM)
+      for (i = recog_data.n_operands - 1; i >= 0; --i)
+	if (GET_CODE (recog_data.operand[i]) == MEM)
 	  {
-	    addr = XEXP (recog_operand[i], 0);
+	    addr = XEXP (recog_data.operand[i], 0);
 	    goto found;
 	  }
       return 0;
diff --git a/gcc/config/i860/i860.c b/gcc/config/i860/i860.c
index d55e912..cb7e7f7 100644
--- a/gcc/config/i860/i860.c
+++ b/gcc/config/i860/i860.c
@@ -1440,7 +1440,7 @@ output_delayed_branch (template, operands, insn)
 
       /* Now recognize the insn which we put in its delay slot.
 	 We must do this after outputting the branch insn,
-	 since operands may just be a pointer to `recog_operand'.  */
+	 since operands may just be a pointer to `recog_data.operand'.  */
       INSN_CODE (delay_insn) = insn_code_number
 	= recog (pat, delay_insn, NULL_PTR);
       if (insn_code_number == -1)
@@ -1448,8 +1448,8 @@ output_delayed_branch (template, operands, insn)
 
       for (i = 0; i < insn_n_operands[insn_code_number]; i++)
 	{
-	  if (GET_CODE (recog_operand[i]) == SUBREG)
-	    recog_operand[i] = alter_subreg (recog_operand[i]);
+	  if (GET_CODE (recog_data.operand[i]) == SUBREG)
+	    recog_data.operand[i] = alter_subreg (recog_data.operand[i]);
 	}
 
       insn_extract (delay_insn);
@@ -1458,8 +1458,9 @@ output_delayed_branch (template, operands, insn)
 
       template = insn_template[insn_code_number];
       if (template == 0)
-	template = (*insn_outfun[insn_code_number]) (recog_operand, delay_insn);
-      output_asm_insn (template, recog_operand);
+	template = ((*insn_outfun[insn_code_number])
+		    (recog_data.operand, delay_insn));
+      output_asm_insn (template, recog_data.operand);
     }
   CC_STATUS_INIT;
   return "";
@@ -1476,7 +1477,7 @@ output_delay_insn (delay_insn)
 
   /* Now recognize the insn which we put in its delay slot.
      We must do this after outputting the branch insn,
-     since operands may just be a pointer to `recog_operand'.  */
+     since operands may just be a pointer to `recog_data.operand'.  */
   insn_code_number = recog_memoized (delay_insn);
   if (insn_code_number == -1)
     abort ();
@@ -1491,8 +1492,8 @@ output_delay_insn (delay_insn)
      make sure they get fixed up here.  -- This is a kludge.  */
   for (i = 0; i < insn_n_operands[insn_code_number]; i++)
     {
-      if (GET_CODE (recog_operand[i]) == SUBREG)
-	recog_operand[i] = alter_subreg (recog_operand[i]);
+      if (GET_CODE (recog_data.operand[i]) == SUBREG)
+	recog_data.operand[i] = alter_subreg (recog_data.operand[i]);
     }
 
 #ifdef REGISTER_CONSTRAINTS
@@ -1514,8 +1515,9 @@ output_delay_insn (delay_insn)
 
   template = insn_template[insn_code_number];
   if (template == 0)
-    template = (*insn_outfun[insn_code_number]) (recog_operand, delay_insn);
-  output_asm_insn (template, recog_operand);
+    template = ((*insn_outfun[insn_code_number])
+		(recog_data.operand, delay_insn));
+  output_asm_insn (template, recog_data.operand);
   return "";
 }
 #endif
diff --git a/gcc/config/mn10200/mn10200.c b/gcc/config/mn10200/mn10200.c
index a74e6b6..2364064 100644
--- a/gcc/config/mn10200/mn10200.c
+++ b/gcc/config/mn10200/mn10200.c
@@ -818,24 +818,24 @@ notice_update_cc (body, insn)
     case CC_NONE_0HIT:
       /* Insn does not change CC, but the 0'th operand has been changed.  */
       if (cc_status.value1 != 0
-	  && reg_overlap_mentioned_p (recog_operand[0], cc_status.value1))
+	  && reg_overlap_mentioned_p (recog_data.operand[0], cc_status.value1))
 	cc_status.value1 = 0;
       break;
 
     case CC_SET_ZN:
-      /* Insn sets the Z,N flags of CC to recog_operand[0].
+      /* Insn sets the Z,N flags of CC to recog_data.operand[0].
 	 V,C is in an unusable state.  */
       CC_STATUS_INIT;
       cc_status.flags |= CC_OVERFLOW_UNUSABLE | CC_NO_CARRY;
-      cc_status.value1 = recog_operand[0];
+      cc_status.value1 = recog_data.operand[0];
       break;
 
     case CC_SET_ZNV:
-      /* Insn sets the Z,N,V flags of CC to recog_operand[0].
+      /* Insn sets the Z,N,V flags of CC to recog_data.operand[0].
 	 C is in an unusable state.  */
       CC_STATUS_INIT;
       cc_status.flags |= CC_NO_CARRY;
-      cc_status.value1 = recog_operand[0];
+      cc_status.value1 = recog_data.operand[0];
       break;
 
     case CC_COMPARE:
diff --git a/gcc/config/mn10300/mn10300.c b/gcc/config/mn10300/mn10300.c
index d85f9d2..80236d2 100644
--- a/gcc/config/mn10300/mn10300.c
+++ b/gcc/config/mn10300/mn10300.c
@@ -482,24 +482,24 @@ notice_update_cc (body, insn)
     case CC_NONE_0HIT:
       /* Insn does not change CC, but the 0'th operand has been changed.  */
       if (cc_status.value1 != 0
-	  && reg_overlap_mentioned_p (recog_operand[0], cc_status.value1))
+	  && reg_overlap_mentioned_p (recog_data.operand[0], cc_status.value1))
 	cc_status.value1 = 0;
       break;
 
     case CC_SET_ZN:
-      /* Insn sets the Z,N flags of CC to recog_operand[0].
+      /* Insn sets the Z,N flags of CC to recog_data.operand[0].
 	 V,C are unusable.  */
       CC_STATUS_INIT;
       cc_status.flags |= CC_NO_CARRY | CC_OVERFLOW_UNUSABLE;
-      cc_status.value1 = recog_operand[0];
+      cc_status.value1 = recog_data.operand[0];
       break;
 
     case CC_SET_ZNV:
-      /* Insn sets the Z,N,V flags of CC to recog_operand[0].
+      /* Insn sets the Z,N,V flags of CC to recog_data.operand[0].
 	 C is unusable.  */
       CC_STATUS_INIT;
       cc_status.flags |= CC_NO_CARRY;
-      cc_status.value1 = recog_operand[0];
+      cc_status.value1 = recog_data.operand[0];
       break;
 
     case CC_COMPARE:
diff --git a/gcc/config/romp/romp.c b/gcc/config/romp/romp.c
index b5096c2..51bd749 100644
--- a/gcc/config/romp/romp.c
+++ b/gcc/config/romp/romp.c
@@ -140,11 +140,11 @@ update_cc (body, insn)
       /* Insn doesn't affect the CC but does modify operand[0], known to be
 	 a register.  */
       if (cc_status.value1 != 0
-	  && reg_overlap_mentioned_p (recog_operand[0], cc_status.value1))
+	  && reg_overlap_mentioned_p (recog_data.operand[0], cc_status.value1))
 	cc_status.value1 = 0;
 
       if (cc_status.value2 != 0
-	  && reg_overlap_mentioned_p (recog_operand[0], cc_status.value2))
+	  && reg_overlap_mentioned_p (recog_data.operand[0], cc_status.value2))
 	cc_status.value2 = 0;
 
       break;
@@ -153,20 +153,20 @@ update_cc (body, insn)
       /* Insn copies operand[1] to operand[0], both registers, but doesn't
          affect the CC.  */
       if (cc_status.value1 != 0
-	  && reg_overlap_mentioned_p (recog_operand[0], cc_status.value1))
+	  && reg_overlap_mentioned_p (recog_data.operand[0], cc_status.value1))
 	cc_status.value1 = 0;
 
       if (cc_status.value2 != 0
-	  && reg_overlap_mentioned_p (recog_operand[0], cc_status.value2))
+	  && reg_overlap_mentioned_p (recog_data.operand[0], cc_status.value2))
 	cc_status.value2 = 0;
 
       if (cc_status.value1 != 0
-	  && rtx_equal_p (cc_status.value1, recog_operand[1]))
-	cc_status.value2 = recog_operand[0];
+	  && rtx_equal_p (cc_status.value1, recog_data.operand[1]))
+	cc_status.value2 = recog_data.operand[0];
 
       if (cc_status.value2 != 0
-	  && rtx_equal_p (cc_status.value2, recog_operand[1]))
-	cc_status.value1 = recog_operand[0];
+	  && rtx_equal_p (cc_status.value2, recog_data.operand[1]))
+	cc_status.value1 = recog_data.operand[0];
 
       break;
 
@@ -176,10 +176,10 @@ update_cc (body, insn)
       break;
 
     case CC_SETS:
-      /* Insn sets CC to recog_operand[0], but overflow is impossible.  */
+      /* Insn sets CC to recog_data.operand[0], but overflow is impossible.  */
       CC_STATUS_INIT;
       cc_status.flags |= CC_NO_OVERFLOW;
-      cc_status.value1 = recog_operand[0];
+      cc_status.value1 = recog_data.operand[0];
       break;
 
    case CC_COMPARE:
diff --git a/gcc/config/sparc/sparc.c b/gcc/config/sparc/sparc.c
index 190a788..6d33f4e 100644
--- a/gcc/config/sparc/sparc.c
+++ b/gcc/config/sparc/sparc.c
@@ -2373,12 +2373,12 @@ check_pic (i)
   switch (flag_pic)
     {
     case 1:
-      if (GET_CODE (recog_operand[i]) == SYMBOL_REF
-	  || (GET_CODE (recog_operand[i]) == CONST
-	      && ! (GET_CODE (XEXP (recog_operand[i], 0)) == MINUS
-		    && (XEXP (XEXP (recog_operand[i], 0), 0)
+      if (GET_CODE (recog_data.operand[i]) == SYMBOL_REF
+	  || (GET_CODE (recog_data.operand[i]) == CONST
+	      && ! (GET_CODE (XEXP (recog_data.operand[i], 0)) == MINUS
+		    && (XEXP (XEXP (recog_data.operand[i], 0), 0)
 			== global_offset_table)
-		    && (GET_CODE (XEXP (XEXP (recog_operand[i], 0), 1))
+		    && (GET_CODE (XEXP (XEXP (recog_data.operand[i], 0), 1))
 			== CONST))))
 	abort ();
     case 2:
diff --git a/gcc/config/v850/v850.c b/gcc/config/v850/v850.c
index a085b51..0b68ced 100644
--- a/gcc/config/v850/v850.c
+++ b/gcc/config/v850/v850.c
@@ -1959,24 +1959,24 @@ notice_update_cc (body, insn)
     case CC_NONE_0HIT:
       /* Insn does not change CC, but the 0'th operand has been changed.  */
       if (cc_status.value1 != 0
-	  && reg_overlap_mentioned_p (recog_operand[0], cc_status.value1))
+	  && reg_overlap_mentioned_p (recog_data.operand[0], cc_status.value1))
 	cc_status.value1 = 0;
       break;
 
     case CC_SET_ZN:
-      /* Insn sets the Z,N flags of CC to recog_operand[0].
+      /* Insn sets the Z,N flags of CC to recog_data.operand[0].
 	 V,C is in an unusable state.  */
       CC_STATUS_INIT;
       cc_status.flags |= CC_OVERFLOW_UNUSABLE | CC_NO_CARRY;
-      cc_status.value1 = recog_operand[0];
+      cc_status.value1 = recog_data.operand[0];
       break;
 
     case CC_SET_ZNV:
-      /* Insn sets the Z,N,V flags of CC to recog_operand[0].
+      /* Insn sets the Z,N,V flags of CC to recog_data.operand[0].
 	 C is in an unusable state.  */
       CC_STATUS_INIT;
       cc_status.flags |= CC_NO_CARRY;
-      cc_status.value1 = recog_operand[0];
+      cc_status.value1 = recog_data.operand[0];
       break;
 
     case CC_COMPARE:
diff --git a/gcc/final.c b/gcc/final.c
index c760705..6ace9b2 100644
--- a/gcc/final.c
+++ b/gcc/final.c
@@ -2873,7 +2873,7 @@ final_scan_insn (insn, file, optimize, prescan, nopeepholes)
 	   it is output.  */
 
 #ifdef FINAL_PRESCAN_INSN
-	FINAL_PRESCAN_INSN (insn, recog_operand, recog_n_operands);
+	FINAL_PRESCAN_INSN (insn, recog_data.operand, recog_data.n_operands);
 #endif
 
 #ifdef HAVE_cc0
@@ -2901,7 +2901,8 @@ final_scan_insn (insn, file, optimize, prescan, nopeepholes)
 	template = insn_template[insn_code_number];
 	if (template == 0)
 	  {
-	    template = (*insn_outfun[insn_code_number]) (recog_operand, insn);
+	    template = ((*insn_outfun[insn_code_number])
+			(recog_data.operand, insn));
 
 	    /* If the C code returns 0, it means that it is a jump insn
 	       which follows a deleted test insn, and that test insn
@@ -2941,7 +2942,7 @@ final_scan_insn (insn, file, optimize, prescan, nopeepholes)
 
 	/* Output assembler code from the template.  */
 
-	output_asm_insn (template, recog_operand);
+	output_asm_insn (template, recog_data.operand);
 
 #if defined (DWARF2_UNWIND_INFO)
 #if !defined (ACCUMULATE_OUTGOING_ARGS)
@@ -3050,22 +3051,22 @@ cleanup_subreg_operands (insn)
   int i;
 
   extract_insn (insn);
-  for (i = 0; i < recog_n_operands; i++)
+  for (i = 0; i < recog_data.n_operands; i++)
     {
-      if (GET_CODE (recog_operand[i]) == SUBREG)
-        recog_operand[i] = alter_subreg (recog_operand[i]);
-      else if (GET_CODE (recog_operand[i]) == PLUS
-               || GET_CODE (recog_operand[i]) == MULT)
-       recog_operand[i] = walk_alter_subreg (recog_operand[i]);
+      if (GET_CODE (recog_data.operand[i]) == SUBREG)
+        recog_data.operand[i] = alter_subreg (recog_data.operand[i]);
+      else if (GET_CODE (recog_data.operand[i]) == PLUS
+               || GET_CODE (recog_data.operand[i]) == MULT)
+       recog_data.operand[i] = walk_alter_subreg (recog_data.operand[i]);
     }
 
-  for (i = 0; i < recog_n_dups; i++)
+  for (i = 0; i < recog_data.n_dups; i++)
     {
-      if (GET_CODE (*recog_dup_loc[i]) == SUBREG)
-        *recog_dup_loc[i] = alter_subreg (*recog_dup_loc[i]);
-      else if (GET_CODE (*recog_dup_loc[i]) == PLUS
-               || GET_CODE (*recog_dup_loc[i]) == MULT)
-        *recog_dup_loc[i] = walk_alter_subreg (*recog_dup_loc[i]);
+      if (GET_CODE (*recog_data.dup_loc[i]) == SUBREG)
+        *recog_data.dup_loc[i] = alter_subreg (*recog_data.dup_loc[i]);
+      else if (GET_CODE (*recog_data.dup_loc[i]) == PLUS
+               || GET_CODE (*recog_data.dup_loc[i]) == MULT)
+        *recog_data.dup_loc[i] = walk_alter_subreg (*recog_data.dup_loc[i]);
     }
 }
 
diff --git a/gcc/genattrtab.c b/gcc/genattrtab.c
index dd16a13..4196c7d 100644
--- a/gcc/genattrtab.c
+++ b/gcc/genattrtab.c
@@ -6083,7 +6083,7 @@ from the machine description file `md'.  */\n\n");
   printf ("#include \"insn-attr.h\"\n");
   printf ("#include \"toplev.h\"\n");
   printf ("\n");  
-  printf ("#define operands recog_operand\n\n");
+  printf ("#define operands recog_data.operand\n\n");
 
   /* Make `insn_alternatives'.  */
   insn_alternatives = (int *) oballoc (insn_code_number * sizeof (int));
diff --git a/gcc/genemit.c b/gcc/genemit.c
index 747001b..bad78b5 100644
--- a/gcc/genemit.c
+++ b/gcc/genemit.c
@@ -818,7 +818,6 @@ from the machine description file `md'.  */\n\n");
   printf ("#include \"hard-reg-set.h\"\n");
   printf ("#include \"resource.h\"\n");
   printf ("#include \"reload.h\"\n\n");
-  printf ("extern rtx recog_operand[];\n");
   printf ("#define FAIL return (end_sequence (), _val)\n");
   printf ("#define DONE return (_val = gen_sequence (), end_sequence (), _val)\n");
 
diff --git a/gcc/genextract.c b/gcc/genextract.c
index e5c528b..35ffbd0 100644
--- a/gcc/genextract.c
+++ b/gcc/genextract.c
@@ -424,8 +424,8 @@ from the machine description file `md'.  */\n\n");
   printf ("void\ninsn_extract (insn)\n");
   printf ("     rtx insn;\n");
   printf ("{\n");
-  printf ("  register rtx *ro = recog_operand;\n");
-  printf ("  register rtx **ro_loc = recog_operand_loc;\n");
+  printf ("  register rtx *ro = recog_data.operand;\n");
+  printf ("  register rtx **ro_loc = recog_data.operand_loc;\n");
   printf ("  rtx pat = PATTERN (insn);\n");
   printf ("  int i ATTRIBUTE_UNUSED;\n\n");
   printf ("  memset (ro, 0, sizeof (*ro) * MAX_RECOG_OPERANDS);\n");
@@ -506,10 +506,10 @@ from the machine description file `md'.  */\n\n");
 
       for (i = 0; i < p->dup_count; i++)
 	{
-	  printf ("      recog_dup_loc[%d] = &", i);
+	  printf ("      recog_data.dup_loc[%d] = &", i);
 	  print_path (p->duplocs[i]);
 	  printf (";\n");
-	  printf ("      recog_dup_num[%d] = %d;\n", i, p->dupnums[i]);
+	  printf ("      recog_data.dup_num[%d] = %d;\n", i, p->dupnums[i]);
 	}
 
       printf ("      break;\n\n");
diff --git a/gcc/genoutput.c b/gcc/genoutput.c
index abe0b77..87c8b98 100644
--- a/gcc/genoutput.c
+++ b/gcc/genoutput.c
@@ -44,7 +44,7 @@ Boston, MA 02111-1307, USA.  */
 
    6. An array of ints `insn_n_dups' which is indexed by insn code number
    and contains the number of match_dup's that appear in the insn's pattern.
-   This says how many elements of `recog_dup_loc' are significant
+   This says how many elements of `recog_data.dup_loc' are significant
    after an insn has been recognized.
 
    7. An array of arrays of operand constraint strings,
diff --git a/gcc/genrecog.c b/gcc/genrecog.c
index 36ac81e..2c2978b 100644
--- a/gcc/genrecog.c
+++ b/gcc/genrecog.c
@@ -1142,7 +1142,7 @@ write_subroutine (tree, type)
     printf ("     rtx *_plast_insn ATTRIBUTE_UNUSED;\n");
 
   printf ("{\n");
-  printf ("  register rtx *ro = &recog_operand[0];\n");
+  printf ("  register rtx *ro = &recog_data.operand[0];\n");
 
   printf ("  register rtx ");
   for (i = 1; i < max_depth; i++)
@@ -1969,7 +1969,7 @@ from the machine description file `md'.  */\n\n");
 
   printf ("*/\n\n");
 
-  printf ("#define operands recog_operand\n\n");
+  printf ("#define operands recog_data.operand\n\n");
 
   next_subroutine_number = 0;
   break_out_subroutines (recog_tree, RECOG, 1);
diff --git a/gcc/local-alloc.c b/gcc/local-alloc.c
index c05a664..76c384a 100644
--- a/gcc/local-alloc.c
+++ b/gcc/local-alloc.c
@@ -1111,12 +1111,12 @@ block_alloc (b)
 
 	  if (1
 #ifdef REGISTER_CONSTRAINTS
-	      && recog_n_operands > 1
-	      && recog_constraints[0][0] == '='
-	      && recog_constraints[0][1] != '&'
+	      && recog_data.n_operands > 1
+	      && recog_data.constraints[0][0] == '='
+	      && recog_data.constraints[0][1] != '&'
 #else
 	      && GET_CODE (PATTERN (insn)) == SET
-	      && rtx_equal_p (SET_DEST (PATTERN (insn)), recog_operand[0])
+	      && rtx_equal_p (SET_DEST (PATTERN (insn)), recog_data.operand[0])
 #endif
 	      )
 	    {
@@ -1127,19 +1127,19 @@ block_alloc (b)
 		 operand 0.  */
 	      int n_matching_alts = 0;
 
-	      for (i = 1; i < recog_n_operands; i++)
+	      for (i = 1; i < recog_data.n_operands; i++)
 		{
-		  const char *p = recog_constraints[i];
+		  const char *p = recog_data.constraints[i];
 		  int this_match = (requires_inout (p));
 
 		  n_matching_alts += this_match;
-		  if (this_match == recog_n_alternatives)
+		  if (this_match == recog_data.n_alternatives)
 		    must_match_0 = i;
 		}
 #endif
 
-	      r0 = recog_operand[0];
-	      for (i = 1; i < recog_n_operands; i++)
+	      r0 = recog_data.operand[0];
+	      for (i = 1; i < recog_data.n_operands; i++)
 		{
 #ifdef REGISTER_CONSTRAINTS
 		  /* Skip this operand if we found an operand that
@@ -1148,9 +1148,9 @@ block_alloc (b)
 
 		  if (must_match_0 >= 0 && i != must_match_0
 		      && ! (i == must_match_0 + 1
-			    && recog_constraints[i-1][0] == '%')
+			    && recog_data.constraints[i-1][0] == '%')
 		      && ! (i == must_match_0 - 1
-			    && recog_constraints[i][0] == '%'))
+			    && recog_data.constraints[i][0] == '%'))
 		    continue;
 
 		  /* Likewise if each alternative has some operand that
@@ -1158,21 +1158,21 @@ block_alloc (b)
 		     operand that doesn't list operand 0 since we know that
 		     the operand always conflicts with operand 0.  We
 		     ignore commutatity in this case to keep things simple.  */
-		  if (n_matching_alts == recog_n_alternatives
-		      && 0 == requires_inout (recog_constraints[i]))
+		  if (n_matching_alts == recog_data.n_alternatives
+		      && 0 == requires_inout (recog_data.constraints[i]))
 		    continue;
 #endif
 
-		  r1 = recog_operand[i];
+		  r1 = recog_data.operand[i];
 
 		  /* If the operand is an address, find a register in it.
 		     There may be more than one register, but we only try one
 		     of them.  */
 		  if (
 #ifdef REGISTER_CONSTRAINTS
-		      recog_constraints[i][0] == 'p'
+		      recog_data.constraints[i][0] == 'p'
 #else
-		      recog_operand_address_p[i]
+		      recog_data.operand_address_p[i]
 #endif
 		      )
 		    while (GET_CODE (r1) == PLUS || GET_CODE (r1) == MULT)
@@ -1186,7 +1186,7 @@ block_alloc (b)
 			 priority to an equivalence found from that insn.  */
 		      int may_save_copy
 #ifdef REGISTER_CONSTRAINTS
-			= (r1 == recog_operand[i] && must_match_0 >= 0);
+			= (r1 == recog_data.operand[i] && must_match_0 >= 0);
 #else
 			= (SET_DEST (body) == r0 && SET_SRC (body) == r1);
 #endif
diff --git a/gcc/recog.c b/gcc/recog.c
index 31ca8cb..2ec5911 100644
--- a/gcc/recog.c
+++ b/gcc/recog.c
@@ -68,45 +68,7 @@ static int insn_invalid_p		PROTO((rtx));
 
 int volatile_ok;
 
-/* The next variables are set up by extract_insn.  The first four of them
-   are also set up during insn_extract.  */
-
-/* Indexed by N, gives value of operand N.  */
-rtx recog_operand[MAX_RECOG_OPERANDS];
-
-/* Indexed by N, gives location where operand N was found.  */
-rtx *recog_operand_loc[MAX_RECOG_OPERANDS];
-
-/* Indexed by N, gives location where the Nth duplicate-appearance of
-   an operand was found.  This is something that matched MATCH_DUP.  */
-rtx *recog_dup_loc[MAX_RECOG_OPERANDS];
-
-/* Indexed by N, gives the operand number that was duplicated in the
-   Nth duplicate-appearance of an operand.  */
-char recog_dup_num[MAX_RECOG_OPERANDS];
-
-/* The number of operands of the insn.  */
-int recog_n_operands;
-
-/* The number of MATCH_DUPs in the insn.  */
-int recog_n_dups;
-
-/* The number of alternatives in the constraints for the insn.  */
-int recog_n_alternatives;
-
-/* Indexed by N, gives the mode of operand N.  */
-enum machine_mode recog_operand_mode[MAX_RECOG_OPERANDS];
-
-/* Indexed by N, gives the constraint string for operand N.  */
-const char *recog_constraints[MAX_RECOG_OPERANDS];
-
-/* Indexed by N, gives the type (in, out, inout) for operand N.  */
-enum op_type recog_op_type[MAX_RECOG_OPERANDS];
-
-#ifndef REGISTER_CONSTRAINTS
-/* Indexed by N, nonzero if operand N should be an address.  */
-char recog_operand_address_p[MAX_RECOG_OPERANDS];
-#endif
+struct recog_data recog_data;
 
 /* Contains a vector of operand_alternative structures for every operand.
    Set up by preprocess_constraints.  */
@@ -2000,11 +1962,8 @@ adj_offsettable_operand (op, offset)
   abort ();
 }
 
-/* Analyze INSN and compute the variables recog_n_operands, recog_n_dups,
-   recog_n_alternatives, recog_operand, recog_operand_loc, recog_constraints,
-   recog_operand_mode, recog_dup_loc and recog_dup_num.
-   If REGISTER_CONSTRAINTS is not defined, also compute
-   recog_operand_address_p.  */
+/* Analyze INSN and fill in recog_data.  */
+
 void
 extract_insn (insn)
      rtx insn;
@@ -2014,9 +1973,9 @@ extract_insn (insn)
   int noperands;
   rtx body = PATTERN (insn);
 
-  recog_n_operands = 0;
-  recog_n_alternatives = 0;
-  recog_n_dups = 0;
+  recog_data.n_operands = 0;
+  recog_data.n_alternatives = 0;
+  recog_data.n_dups = 0;
 
   switch (GET_CODE (body))
     {
@@ -2030,7 +1989,7 @@ extract_insn (insn)
     case SET:
     case PARALLEL:
     case ASM_OPERANDS:
-      recog_n_operands = noperands = asm_noperands (body);
+      recog_data.n_operands = noperands = asm_noperands (body);
       if (noperands >= 0)
 	{
 	  /* This insn is an `asm' with operands.  */
@@ -2040,17 +1999,20 @@ extract_insn (insn)
 	    abort ();
 
 	  /* Now get the operand values and constraints out of the insn.  */
-	  decode_asm_operands (body, recog_operand, recog_operand_loc,
-			       recog_constraints, recog_operand_mode);
+	  decode_asm_operands (body, recog_data.operand,
+			       recog_data.operand_loc,
+			       recog_data.constraints,
+			       recog_data.operand_mode);
 	  if (noperands > 0)
 	    {
-	      const char *p =  recog_constraints[0];
-	      recog_n_alternatives = 1;
+	      const char *p =  recog_data.constraints[0];
+	      recog_data.n_alternatives = 1;
 	      while (*p)
-		recog_n_alternatives += (*p++ == ',');
+		recog_data.n_alternatives += (*p++ == ',');
 	    }
 #ifndef REGISTER_CONSTRAINTS
-	  bzero (recog_operand_address_p, sizeof recog_operand_address_p);
+	  bzero (recog_data.operand_address_p,
+		 sizeof recog_data.operand_address_p);
 #endif
 	  break;
 	}
@@ -2065,28 +2027,29 @@ extract_insn (insn)
       if (icode < 0)
 	fatal_insn_not_found (insn);
 
-      recog_n_operands = noperands = insn_n_operands[icode];
-      recog_n_alternatives = insn_n_alternatives[icode];
-      recog_n_dups = insn_n_dups[icode];
+      recog_data.n_operands = noperands = insn_n_operands[icode];
+      recog_data.n_alternatives = insn_n_alternatives[icode];
+      recog_data.n_dups = insn_n_dups[icode];
 
       insn_extract (insn);
 
       for (i = 0; i < noperands; i++)
 	{
 #ifdef REGISTER_CONSTRAINTS
-	  recog_constraints[i] = insn_operand_constraint[icode][i];
+	  recog_data.constraints[i] = insn_operand_constraint[icode][i];
 #else
-	  recog_operand_address_p[i] = insn_operand_address_p[icode][i];
+	  recog_data.operand_address_p[i] = insn_operand_address_p[icode][i];
 #endif
-	  recog_operand_mode[i] = insn_operand_mode[icode][i];
+	  recog_data.operand_mode[i] = insn_operand_mode[icode][i];
 	}
     }
   for (i = 0; i < noperands; i++)
-    recog_op_type[i] = (recog_constraints[i][0] == '=' ? OP_OUT
-			: recog_constraints[i][0] == '+' ? OP_INOUT
-			: OP_IN);
+    recog_data.operand_type[i]
+      = (recog_data.constraints[i][0] == '=' ? OP_OUT
+	 : recog_data.constraints[i][0] == '+' ? OP_INOUT
+	 : OP_IN);
 
-  if (recog_n_alternatives > MAX_RECOG_ALTERNATIVES)
+  if (recog_data.n_alternatives > MAX_RECOG_ALTERNATIVES)
     abort ();
 }
 
@@ -2099,15 +2062,15 @@ preprocess_constraints ()
   int i;
 
   bzero (recog_op_alt, sizeof recog_op_alt);
-  for (i = 0; i < recog_n_operands; i++)
+  for (i = 0; i < recog_data.n_operands; i++)
     {
       int j;
       struct operand_alternative *op_alt;
-      const char *p = recog_constraints[i];
+      const char *p = recog_data.constraints[i];
 
       op_alt = recog_op_alt[i];
 
-      for (j = 0; j < recog_n_alternatives; j++)
+      for (j = 0; j < recog_data.n_alternatives; j++)
 	{
 	  op_alt[j].class = NO_REGS;
 	  op_alt[j].constraint = p;
@@ -2241,26 +2204,26 @@ constrain_operands (strict)
   struct funny_match funny_match[MAX_RECOG_OPERANDS];
   int funny_match_index;
 
-  if (recog_n_operands == 0 || recog_n_alternatives == 0)
+  if (recog_data.n_operands == 0 || recog_data.n_alternatives == 0)
     return 1;
 
-  for (c = 0; c < recog_n_operands; c++)
+  for (c = 0; c < recog_data.n_operands; c++)
     {
-      constraints[c] = recog_constraints[c];
+      constraints[c] = recog_data.constraints[c];
       matching_operands[c] = -1;
     }
 
   which_alternative = 0;
 
-  while (which_alternative < recog_n_alternatives)
+  while (which_alternative < recog_data.n_alternatives)
     {
       register int opno;
       int lose = 0;
       funny_match_index = 0;
 
-      for (opno = 0; opno < recog_n_operands; opno++)
+      for (opno = 0; opno < recog_data.n_operands; opno++)
 	{
-	  register rtx op = recog_operand[opno];
+	  register rtx op = recog_data.operand[opno];
 	  enum machine_mode mode = GET_MODE (op);
 	  register const char *p = constraints[opno];
 	  int offset = 0;
@@ -2320,8 +2283,8 @@ constrain_operands (strict)
 		  val = 1;
 		else
 		  {
-		    rtx op1 = recog_operand[c - '0'];
-		    rtx op2 = recog_operand[opno];
+		    rtx op1 = recog_data.operand[c - '0'];
+		    rtx op2 = recog_data.operand[opno];
 
 	            /* A unary operator may be accepted by the predicate,
 		       but it is irrelevant for matching constraints.  */
@@ -2354,7 +2317,7 @@ constrain_operands (strict)
 		   strictly valid, i.e., that all pseudos requiring hard regs
 		   have gotten them.  */
 		if (strict <= 0
-		    || (strict_memory_address_p (recog_operand_mode[opno],
+		    || (strict_memory_address_p (recog_data.operand_mode[opno],
 						 op)))
 		  win = 1;
 		break;
@@ -2535,31 +2498,31 @@ constrain_operands (strict)
 	     operand.  */
 
 	  if (strict > 0)
-	    for (eopno = 0; eopno < recog_n_operands; eopno++)
+	    for (eopno = 0; eopno < recog_data.n_operands; eopno++)
 	      /* Ignore earlyclobber operands now in memory,
 		 because we would often report failure when we have
 		 two memory operands, one of which was formerly a REG.  */
 	      if (earlyclobber[eopno]
-		  && GET_CODE (recog_operand[eopno]) == REG)
-		for (opno = 0; opno < recog_n_operands; opno++)
-		  if ((GET_CODE (recog_operand[opno]) == MEM
-		       || recog_op_type[opno] != OP_OUT)
+		  && GET_CODE (recog_data.operand[eopno]) == REG)
+		for (opno = 0; opno < recog_data.n_operands; opno++)
+		  if ((GET_CODE (recog_data.operand[opno]) == MEM
+		       || recog_data.operand_type[opno] != OP_OUT)
 		      && opno != eopno
 		      /* Ignore things like match_operator operands.  */
-		      && *recog_constraints[opno] != 0
+		      && *recog_data.constraints[opno] != 0
 		      && ! (matching_operands[opno] == eopno
-			    && operands_match_p (recog_operand[opno],
-						 recog_operand[eopno]))
-		      && ! safe_from_earlyclobber (recog_operand[opno],
-						   recog_operand[eopno]))
+			    && operands_match_p (recog_data.operand[opno],
+						 recog_data.operand[eopno]))
+		      && ! safe_from_earlyclobber (recog_data.operand[opno],
+						   recog_data.operand[eopno]))
 		    lose = 1;
 
 	  if (! lose)
 	    {
 	      while (--funny_match_index >= 0)
 		{
-		  recog_operand[funny_match[funny_match_index].other]
-		    = recog_operand[funny_match[funny_match_index].this];
+		  recog_data.operand[funny_match[funny_match_index].other]
+		    = recog_data.operand[funny_match[funny_match_index].this];
 		}
 
 	      return 1;
diff --git a/gcc/recog.h b/gcc/recog.h
index 0337214..55ddb29 100644
--- a/gcc/recog.h
+++ b/gcc/recog.h
@@ -127,44 +127,53 @@ extern int which_alternative;
 
 /* The following vectors hold the results from insn_extract.  */
 
-/* Indexed by N, gives value of operand N.  */
-extern rtx recog_operand[];
+struct recog_data
+{
+  /* It is very tempting to make the 5 operand related arrays into a
+     structure and index on that.  However, to be source compatible
+     with all of the existing md file insn constraints and output
+     templates, we need `operand' as a flat array.  Without that
+     member, making an array for the rest seems pointless.  */
 
-/* Indexed by N, gives location where operand N was found.  */
-extern rtx *recog_operand_loc[];
+  /* Gives value of operand N.  */
+  rtx operand[MAX_RECOG_OPERANDS];
 
-/* Indexed by N, gives location where the Nth duplicate-appearance of
-   an operand was found.  This is something that matched MATCH_DUP.  */
-extern rtx *recog_dup_loc[];
+  /* Gives location where operand N was found.  */
+  rtx *operand_loc[MAX_RECOG_OPERANDS];
 
-/* Indexed by N, gives the operand number that was duplicated in the
-   Nth duplicate-appearance of an operand.  */
-extern char recog_dup_num[];
+  /* Gives the constraint string for operand N.  */
+  const char *constraints[MAX_RECOG_OPERANDS];
 
-/* The next variables are set up by extract_insn.  */
+  /* Gives the mode of operand N.  */
+  enum machine_mode operand_mode[MAX_RECOG_OPERANDS];
 
-/* The number of operands of the insn.  */
-extern int recog_n_operands;
+  /* Gives the type (in, out, inout) for operand N.  */
+  enum op_type operand_type[MAX_RECOG_OPERANDS];
 
-/* The number of MATCH_DUPs in the insn.  */
-extern int recog_n_dups;
+  /* Gives location where the Nth duplicate-appearance of an operand
+     was found.  This is something that matched MATCH_DUP.  */
+  rtx *dup_loc[MAX_DUP_OPERANDS];
 
-/* The number of alternatives in the constraints for the insn.  */
-extern int recog_n_alternatives;
+  /* Gives the operand number that was duplicated in the Nth
+     duplicate-appearance of an operand.  */
+  unsigned char dup_num[MAX_DUP_OPERANDS];
 
-/* Indexed by N, gives the mode of operand N.  */
-extern enum machine_mode recog_operand_mode[];
+#ifndef REGISTER_CONSTRAINTS
+  /* Nonzero if operand N should be an address.  */
+  unsigned char operand_address_p[MAX_RECOG_OPERANDS];
+#endif
 
-/* Indexed by N, gives the constraint string for operand N.  */
-extern const char *recog_constraints[];
+  /* The number of operands of the insn.  */
+  unsigned char n_operands;
 
-/* Indexed by N, gives the type (in, out, inout) for operand N.  */
-extern enum op_type recog_op_type[];
+  /* The number of MATCH_DUPs in the insn.  */
+  unsigned char n_dups;
 
-#ifndef REGISTER_CONSTRAINTS
-/* Indexed by N, nonzero if operand N should be an address.  */
-extern char recog_operand_address_p[];
-#endif
+  /* The number of alternatives in the constraints for the insn.  */
+  unsigned char n_alternatives;
+};
+
+extern struct recog_data recog_data;
 
 /* Contains a vector of operand_alternative structures for every operand.
    Set up by preprocess_constraints.  */
diff --git a/gcc/reg-stack.c b/gcc/reg-stack.c
index e0f1b27..f1b35b8 100644
--- a/gcc/reg-stack.c
+++ b/gcc/reg-stack.c
@@ -711,7 +711,7 @@ record_asm_reg_life (insn, regstack)
   preprocess_constraints ();
 
   n_inputs = get_asm_operand_n_inputs (body);
-  n_outputs = recog_n_operands - n_inputs;
+  n_outputs = recog_data.n_operands - n_inputs;
 
   if (alt < 0)
     {
@@ -723,10 +723,10 @@ record_asm_reg_life (insn, regstack)
     }
 
   /* Strip SUBREGs here to make the following code simpler.  */
-  for (i = 0; i < recog_n_operands; i++)
-    if (GET_CODE (recog_operand[i]) == SUBREG
-	&& GET_CODE (SUBREG_REG (recog_operand[i])) == REG)
-      recog_operand[i] = SUBREG_REG (recog_operand[i]);
+  for (i = 0; i < recog_data.n_operands; i++)
+    if (GET_CODE (recog_data.operand[i]) == SUBREG
+	&& GET_CODE (SUBREG_REG (recog_data.operand[i])) == REG)
+      recog_data.operand[i] = SUBREG_REG (recog_data.operand[i]);
 
   /* Set up CLOBBER_REG.  */
 
@@ -762,7 +762,7 @@ record_asm_reg_life (insn, regstack)
 
   bzero ((char *) reg_used_as_output, sizeof (reg_used_as_output));
   for (i = 0; i < n_outputs; i++)
-    if (STACK_REG_P (recog_operand[i]))
+    if (STACK_REG_P (recog_data.operand[i]))
       {
 	if (reg_class_size[(int) recog_op_alt[i][alt].class] != 1)
 	  {
@@ -770,7 +770,7 @@ record_asm_reg_life (insn, regstack)
 	    malformed_asm = 1;
 	  }
         else
-	  reg_used_as_output[REGNO (recog_operand[i])] = 1;
+	  reg_used_as_output[REGNO (recog_data.operand[i])] = 1;
       }
 
 
@@ -796,18 +796,18 @@ record_asm_reg_life (insn, regstack)
 
   bzero ((char *) implicitly_dies, sizeof (implicitly_dies));
   for (i = n_outputs; i < n_outputs + n_inputs; i++)
-    if (STACK_REG_P (recog_operand[i]))
+    if (STACK_REG_P (recog_data.operand[i]))
       {
 	/* An input reg is implicitly popped if it is tied to an
 	   output, or if there is a CLOBBER for it.  */
 	int j;
 
 	for (j = 0; j < n_clobbers; j++)
-	  if (operands_match_p (clobber_reg[j], recog_operand[i]))
+	  if (operands_match_p (clobber_reg[j], recog_data.operand[i]))
 	    break;
 
 	if (j < n_clobbers || recog_op_alt[i][alt].matches >= 0)
-	  implicitly_dies[REGNO (recog_operand[i])] = 1;
+	  implicitly_dies[REGNO (recog_data.operand[i])] = 1;
       }
 
   /* Search for first non-popped reg.  */
@@ -839,7 +839,7 @@ record_asm_reg_life (insn, regstack)
 	int j;
 
 	for (j = 0; j < n_outputs; j++)
-	  if (operands_match_p (recog_operand[j], recog_operand[i]))
+	  if (operands_match_p (recog_data.operand[j], recog_data.operand[i]))
 	    {
 	      error_for_asm (insn,
 			     "Output operand %d must use `&' constraint", j);
@@ -858,7 +858,7 @@ record_asm_reg_life (insn, regstack)
   /* Process all outputs */
   for (i = 0; i < n_outputs; i++)
     {
-      rtx op = recog_operand[i];
+      rtx op = recog_data.operand[i];
 
       if (! STACK_REG_P (op))
 	{
@@ -882,7 +882,7 @@ record_asm_reg_life (insn, regstack)
   /* Process all inputs */
   for (i = n_outputs; i < n_outputs + n_inputs; i++)
     {
-      rtx op = recog_operand[i];
+      rtx op = recog_data.operand[i];
       if (! STACK_REG_P (op))
 	{
 	  if (stack_regs_mentioned_p (op))
@@ -2280,18 +2280,18 @@ subst_asm_stack_regs (insn, regstack)
   preprocess_constraints ();
 
   n_inputs = get_asm_operand_n_inputs (body);
-  n_outputs = recog_n_operands - n_inputs;
+  n_outputs = recog_data.n_operands - n_inputs;
   
   if (alt < 0)
     abort ();
 
   /* Strip SUBREGs here to make the following code simpler.  */
-  for (i = 0; i < recog_n_operands; i++)
-    if (GET_CODE (recog_operand[i]) == SUBREG
-	&& GET_CODE (SUBREG_REG (recog_operand[i])) == REG)
+  for (i = 0; i < recog_data.n_operands; i++)
+    if (GET_CODE (recog_data.operand[i]) == SUBREG
+	&& GET_CODE (SUBREG_REG (recog_data.operand[i])) == REG)
       {
-	recog_operand_loc[i] = & SUBREG_REG (recog_operand[i]);
-	recog_operand[i] = SUBREG_REG (recog_operand[i]);
+	recog_data.operand_loc[i] = & SUBREG_REG (recog_data.operand[i]);
+	recog_data.operand[i] = SUBREG_REG (recog_data.operand[i]);
       }
 
   /* Set up NOTE_REG, NOTE_LOC and NOTE_KIND.  */
@@ -2362,34 +2362,34 @@ subst_asm_stack_regs (insn, regstack)
   /* Put the input regs into the desired place in TEMP_STACK.  */
 
   for (i = n_outputs; i < n_outputs + n_inputs; i++)
-    if (STACK_REG_P (recog_operand[i])
+    if (STACK_REG_P (recog_data.operand[i])
 	&& reg_class_subset_p (recog_op_alt[i][alt].class,
 			       FLOAT_REGS)
 	&& recog_op_alt[i][alt].class != FLOAT_REGS)
       {
 	/* If an operand needs to be in a particular reg in
 	   FLOAT_REGS, the constraint was either 't' or 'u'.  Since
-	   these constraints are for single register classes, and reload
-	   guaranteed that operand[i] is already in that class, we can
-	   just use REGNO (recog_operand[i]) to know which actual reg this
-	   operand needs to be in.  */
+	   these constraints are for single register classes, and
+	   reload guaranteed that operand[i] is already in that class,
+	   we can just use REGNO (recog_data.operand[i]) to know which
+	   actual reg this operand needs to be in.  */
 
-	int regno = get_hard_regnum (&temp_stack, recog_operand[i]);
+	int regno = get_hard_regnum (&temp_stack, recog_data.operand[i]);
 
 	if (regno < 0)
 	  abort ();
 
-	if (regno != REGNO (recog_operand[i]))
+	if (regno != REGNO (recog_data.operand[i]))
 	  {
-	    /* recog_operand[i] is not in the right place.  Find it
-	       and swap it with whatever is already in I's place.
-	       K is where recog_operand[i] is now.  J is where it should
-	       be.  */
+	    /* recog_data.operand[i] is not in the right place.  Find
+	       it and swap it with whatever is already in I's place.
+	       K is where recog_data.operand[i] is now.  J is where it
+	       should be.  */
 	    int j, k, temp;
 
 	    k = temp_stack.top - (regno - FIRST_STACK_REG);
 	    j = (temp_stack.top
-		 - (REGNO (recog_operand[i]) - FIRST_STACK_REG));
+		 - (REGNO (recog_data.operand[i]) - FIRST_STACK_REG));
 
 	    temp = temp_stack.reg[k];
 	    temp_stack.reg[k] = temp_stack.reg[j];
@@ -2406,14 +2406,14 @@ subst_asm_stack_regs (insn, regstack)
      clobbers too, because these are for inputs, not outputs.  */
 
   for (i = n_outputs; i < n_outputs + n_inputs; i++)
-    if (STACK_REG_P (recog_operand[i]))
+    if (STACK_REG_P (recog_data.operand[i]))
       {
-	int regnum = get_hard_regnum (regstack, recog_operand[i]);
+	int regnum = get_hard_regnum (regstack, recog_data.operand[i]);
 
 	if (regnum < 0)
 	  abort ();
 
-	replace_reg (recog_operand_loc[i], regnum);
+	replace_reg (recog_data.operand_loc[i], regnum);
       }
 
   for (i = 0; i < n_notes; i++)
@@ -2446,23 +2446,23 @@ subst_asm_stack_regs (insn, regstack)
   /* Now remove from REGSTACK any inputs that the asm implicitly popped.  */
 
   for (i = n_outputs; i < n_outputs + n_inputs; i++)
-    if (STACK_REG_P (recog_operand[i]))
+    if (STACK_REG_P (recog_data.operand[i]))
       {
 	/* An input reg is implicitly popped if it is tied to an
 	   output, or if there is a CLOBBER for it.  */
 	int j;
 
 	for (j = 0; j < n_clobbers; j++)
-	  if (operands_match_p (clobber_reg[j], recog_operand[i]))
+	  if (operands_match_p (clobber_reg[j], recog_data.operand[i]))
 	    break;
 
 	if (j < n_clobbers || recog_op_alt[i][alt].matches >= 0)
 	  {
-	    /* recog_operand[i] might not be at the top of stack.  But that's
-	       OK, because all we need to do is pop the right number of regs
-	       off of the top of the reg-stack.  record_asm_stack_regs
-	       guaranteed that all implicitly popped regs were grouped
-	       at the top of the reg-stack.  */
+	    /* recog_data.operand[i] might not be at the top of stack.
+	       But that's OK, because all we need to do is pop the
+	       right number of regs off of the top of the reg-stack.
+	       record_asm_stack_regs guaranteed that all implicitly
+	       popped regs were grouped at the top of the reg-stack.  */
 
 	    CLEAR_HARD_REG_BIT (regstack->reg_set,
 				regstack->reg[regstack->top]);
@@ -2480,7 +2480,8 @@ subst_asm_stack_regs (insn, regstack)
       int j;
 
       for (j = 0; j < n_outputs; j++)
-	if (STACK_REG_P (recog_operand[j]) && REGNO (recog_operand[j]) == i)
+	if (STACK_REG_P (recog_data.operand[j])
+	    && REGNO (recog_data.operand[j]) == i)
 	  {
 	    regstack->reg[++regstack->top] = i;
 	    SET_HARD_REG_BIT (regstack->reg_set, i);
@@ -2496,32 +2497,32 @@ subst_asm_stack_regs (insn, regstack)
      in the death notes have already been substituted.  */
 
   for (i = 0; i < n_outputs; i++)
-    if (STACK_REG_P (recog_operand[i]))
+    if (STACK_REG_P (recog_data.operand[i]))
       {
 	int j;
 
 	for (j = 0; j < n_notes; j++)
-	  if (REGNO (recog_operand[i]) == REGNO (note_reg[j])
+	  if (REGNO (recog_data.operand[i]) == REGNO (note_reg[j])
 	      && note_kind[j] == REG_UNUSED)
 	    {
-	      insn = emit_pop_insn (insn, regstack, recog_operand[i],
+	      insn = emit_pop_insn (insn, regstack, recog_data.operand[i],
 				    emit_insn_after);
 	      break;
 	    }
       }
 
   for (i = n_outputs; i < n_outputs + n_inputs; i++)
-    if (STACK_REG_P (recog_operand[i]))
+    if (STACK_REG_P (recog_data.operand[i]))
       {
 	int j;
 
 	for (j = 0; j < n_notes; j++)
-	  if (REGNO (recog_operand[i]) == REGNO (note_reg[j])
+	  if (REGNO (recog_data.operand[i]) == REGNO (note_reg[j])
 	      && note_kind[j] == REG_DEAD
 	      && TEST_HARD_REG_BIT (regstack->reg_set,
-				    REGNO (recog_operand[i])))
+				    REGNO (recog_data.operand[i])))
 	    {
-	      insn = emit_pop_insn (insn, regstack, recog_operand[i],
+	      insn = emit_pop_insn (insn, regstack, recog_data.operand[i],
 				    emit_insn_after);
 	      break;
 	    }
diff --git a/gcc/regclass.c b/gcc/regclass.c
index 6aa1857..5867024 100644
--- a/gcc/regclass.c
+++ b/gcc/regclass.c
@@ -791,10 +791,10 @@ scan_one_insn (insn, pass)
   set = single_set (insn);
   extract_insn (insn);
 
-  for (i = 0; i < recog_n_operands; i++)
+  for (i = 0; i < recog_data.n_operands; i++)
     {
-      constraints[i] = recog_constraints[i];
-      modes[i] = recog_operand_mode[i];
+      constraints[i] = recog_data.constraints[i];
+      modes[i] = recog_data.operand_mode[i];
     }
   memset (subreg_changes_size, 0, sizeof (subreg_changes_size));
 
@@ -830,24 +830,22 @@ scan_one_insn (insn, pass)
      do this during our first pass.  */
 
   if (pass == 0 && optimize
-      && recog_n_operands >= 3
-      && recog_constraints[1][0] == '0'
-      && recog_constraints[1][1] == 0
-      && CONSTANT_P (recog_operand[1])
-      && ! rtx_equal_p (recog_operand[0], recog_operand[1])
-      && ! rtx_equal_p (recog_operand[0], recog_operand[2])
-      && GET_CODE (recog_operand[0]) == REG
-      && MODES_TIEABLE_P (GET_MODE (recog_operand[0]),
-			  recog_operand_mode[1]))
+      && recog_data.n_operands >= 3
+      && recog_data.constraints[1][0] == '0'
+      && recog_data.constraints[1][1] == 0
+      && CONSTANT_P (recog_data.operand[1])
+      && ! rtx_equal_p (recog_data.operand[0], recog_data.operand[1])
+      && ! rtx_equal_p (recog_data.operand[0], recog_data.operand[2])
+      && GET_CODE (recog_data.operand[0]) == REG
+      && MODES_TIEABLE_P (GET_MODE (recog_data.operand[0]),
+			  recog_data.operand_mode[1]))
     {
       rtx previnsn = prev_real_insn (insn);
       rtx dest
-	= gen_lowpart (recog_operand_mode[1],
-		       recog_operand[0]);
+	= gen_lowpart (recog_data.operand_mode[1],
+		       recog_data.operand[0]);
       rtx newinsn
-	= emit_insn_before (gen_move_insn (dest,
-					   recog_operand[1]),
-			    insn);
+	= emit_insn_before (gen_move_insn (dest, recog_data.operand[1]), insn);
 
       /* If this insn was the start of a basic block,
 	 include the new insn in that block.
@@ -863,12 +861,12 @@ scan_one_insn (insn, pass)
 	}
 
       /* This makes one more setting of new insns's dest.  */
-      REG_N_SETS (REGNO (recog_operand[0]))++;
+      REG_N_SETS (REGNO (recog_data.operand[0]))++;
 
-      *recog_operand_loc[1] = recog_operand[0];
-      for (i = recog_n_dups - 1; i >= 0; i--)
-	if (recog_dup_num[i] == 1)
-	  *recog_dup_loc[i] = recog_operand[0];
+      *recog_data.operand_loc[1] = recog_data.operand[0];
+      for (i = recog_data.n_dups - 1; i >= 0; i--)
+	if (recog_data.dup_num[i] == 1)
+	  *recog_data.dup_loc[i] = recog_data.operand[0];
 
       return PREV_INSN (newinsn);
     }
@@ -879,23 +877,23 @@ scan_one_insn (insn, pass)
      classes for any pseudos, doing it twice if some pair of
      operands are commutative.  */
 	     
-  for (i = 0; i < recog_n_operands; i++)
+  for (i = 0; i < recog_data.n_operands; i++)
     {
       op_costs[i] = init_cost;
 
-      if (GET_CODE (recog_operand[i]) == SUBREG)
+      if (GET_CODE (recog_data.operand[i]) == SUBREG)
 	{
-	  rtx inner = SUBREG_REG (recog_operand[i]);
+	  rtx inner = SUBREG_REG (recog_data.operand[i]);
 	  if (GET_MODE_SIZE (modes[i]) != GET_MODE_SIZE (GET_MODE (inner)))
 	    subreg_changes_size[i] = 1;
-	  recog_operand[i] = inner;
+	  recog_data.operand[i] = inner;
 	}
 
-      if (GET_CODE (recog_operand[i]) == MEM)
-	record_address_regs (XEXP (recog_operand[i], 0),
+      if (GET_CODE (recog_data.operand[i]) == MEM)
+	record_address_regs (XEXP (recog_data.operand[i], 0),
 			     BASE_REG_CLASS, loop_cost * 2);
       else if (constraints[i][0] == 'p')
-	record_address_regs (recog_operand[i],
+	record_address_regs (recog_data.operand[i],
 			     BASE_REG_CLASS, loop_cost * 2);
     }
 
@@ -903,7 +901,7 @@ scan_one_insn (insn, pass)
      have been initialized.  We must do this even if one operand
      is a constant--see addsi3 in m68k.md.  */
 
-  for (i = 0; i < recog_n_operands - 1; i++)
+  for (i = 0; i < recog_data.n_operands - 1; i++)
     if (constraints[i][0] == '%')
       {
 	const char *xconstraints[MAX_RECOG_OPERANDS];
@@ -912,27 +910,28 @@ scan_one_insn (insn, pass)
 	/* Handle commutative operands by swapping the constraints.
 	   We assume the modes are the same.  */
 
-	for (j = 0; j < recog_n_operands; j++)
+	for (j = 0; j < recog_data.n_operands; j++)
 	  xconstraints[j] = constraints[j];
 
 	xconstraints[i] = constraints[i+1];
 	xconstraints[i+1] = constraints[i];
-	record_reg_classes (recog_n_alternatives, recog_n_operands,
-			    recog_operand, modes, subreg_changes_size,
+	record_reg_classes (recog_data.n_alternatives, recog_data.n_operands,
+			    recog_data.operand, modes, subreg_changes_size,
 			    xconstraints, insn);
       }
 
-  record_reg_classes (recog_n_alternatives, recog_n_operands, recog_operand,
-		      modes, subreg_changes_size, constraints, insn);
+  record_reg_classes (recog_data.n_alternatives, recog_data.n_operands,
+		      recog_data.operand, modes, subreg_changes_size,
+		      constraints, insn);
 
   /* Now add the cost for each operand to the total costs for
      its register.  */
 
-  for (i = 0; i < recog_n_operands; i++)
-    if (GET_CODE (recog_operand[i]) == REG
-	&& REGNO (recog_operand[i]) >= FIRST_PSEUDO_REGISTER)
+  for (i = 0; i < recog_data.n_operands; i++)
+    if (GET_CODE (recog_data.operand[i]) == REG
+	&& REGNO (recog_data.operand[i]) >= FIRST_PSEUDO_REGISTER)
       {
-	int regno = REGNO (recog_operand[i]);
+	int regno = REGNO (recog_data.operand[i]);
 	struct costs *p = &costs[regno], *q = &op_costs[i];
 
 	p->mem_cost += q->mem_cost * loop_cost;
@@ -1472,10 +1471,10 @@ record_reg_classes (n_alts, n_ops, ops, modes, subreg_changes_size,
 
 	  else if (classes[i] != NO_REGS)
 	    {
-	      if (recog_op_type[i] != OP_OUT)
+	      if (recog_data.operand_type[i] != OP_OUT)
 		alt_cost += copy_cost (op, mode, classes[i], 1);
 
-	      if (recog_op_type[i] != OP_IN)
+	      if (recog_data.operand_type[i] != OP_IN)
 		alt_cost += copy_cost (op, mode, classes[i], 0);
 	    }
 
@@ -1499,7 +1498,7 @@ record_reg_classes (n_alts, n_ops, ops, modes, subreg_changes_size,
 	    && REGNO (ops[i]) >= FIRST_PSEUDO_REGISTER)
 	  {
 	    struct costs *pp = &op_costs[i], *qq = &this_op_costs[i];
-	    int scale = 1 + (recog_op_type[i] == OP_INOUT);
+	    int scale = 1 + (recog_data.operand_type[i] == OP_INOUT);
 
 	    pp->mem_cost = MIN (pp->mem_cost,
 				(qq->mem_cost + alt_cost) * scale);
diff --git a/gcc/regmove.c b/gcc/regmove.c
index 424e3b1..fea96c9 100644
--- a/gcc/regmove.c
+++ b/gcc/regmove.c
@@ -1173,7 +1173,7 @@ regmove_optimize (f, nregs, regmove_dump_file)
 	     If it dies there, then replace the dest in both operands with
 	     the source operand.  */
 
-	  for (op_no = 0; op_no < recog_n_operands; op_no++)
+	  for (op_no = 0; op_no < recog_data.n_operands; op_no++)
 	    {
 	      rtx src, dst, src_subreg;
 	      enum reg_class src_class, dst_class;
@@ -1184,8 +1184,8 @@ regmove_optimize (f, nregs, regmove_dump_file)
 	      if (match_no < 0)
 		continue;
 
-	      src = recog_operand[op_no];
-	      dst = recog_operand[match_no];
+	      src = recog_data.operand[op_no];
+	      dst = recog_data.operand[match_no];
 
 	      if (GET_CODE (src) != REG)
 		continue;
@@ -1225,20 +1225,23 @@ regmove_optimize (f, nregs, regmove_dump_file)
 		continue;
 
 	      /* Make sure match_operand is the destination.  */
-	      if (recog_operand[match_no] != SET_DEST (set))
+	      if (recog_data.operand[match_no] != SET_DEST (set))
 		continue;
 
-	      /* If the operands already match, then there is nothing to do.  */
-	      /* But in the commutative case, we might find a better match.  */
-	      if (operands_match_p (src, dst)
-		  || (match.commutative[op_no] >= 0
-		      && operands_match_p (recog_operand[match.commutative
-							 [op_no]], dst)
-		      && (replacement_quality (recog_operand[match.commutative
-							     [op_no]])
-			  >= replacement_quality (src))))
+	      /* If the operands already match, then there is nothing to do. */
+	      if (operands_match_p (src, dst))
 		continue;
 
+	      /* But in the commutative case, we might find a better match.  */
+	      if (match.commutative[op_no] >= 0)
+		{
+		  rtx comm = recog_data.operand[match.commutative[op_no]];
+		  if (operands_match_p (comm, dst)
+		      && (replacement_quality (comm)
+			  >= replacement_quality (src)))
+		    continue;
+		}
+
 	      src_class = reg_preferred_class (REGNO (src));
 	      dst_class = reg_preferred_class (REGNO (dst));
 	      if (! regclass_compatible_p (src_class, dst_class))
@@ -1284,7 +1287,7 @@ regmove_optimize (f, nregs, regmove_dump_file)
 
 	  copy_src = NULL_RTX;
 	  copy_dst = NULL_RTX;
-	  for (op_no = 0; op_no < recog_n_operands; op_no++)
+	  for (op_no = 0; op_no < recog_data.n_operands; op_no++)
 	    {
 	      rtx set, p, src, dst;
 	      rtx src_note, dst_note;
@@ -1298,8 +1301,8 @@ regmove_optimize (f, nregs, regmove_dump_file)
 	      if (match_no < 0)
 		continue;
 
-	      dst = recog_operand[match_no];
-	      src = recog_operand[op_no];
+	      dst = recog_data.operand[match_no];
+	      src = recog_data.operand[op_no];
 
 	      if (GET_CODE (src) != REG)
 		continue;
@@ -1309,12 +1312,17 @@ regmove_optimize (f, nregs, regmove_dump_file)
 		  || REG_LIVE_LENGTH (REGNO (dst)) < 0)
 		continue;
 
-	      /* If the operands already match, then there is nothing to do.  */
-	      if (operands_match_p (src, dst)
-		  || (match.commutative[op_no] >= 0
-		      && operands_match_p (recog_operand[match.commutative[op_no]], dst)))
+	      /* If the operands already match, then there is nothing to do. */
+	      if (operands_match_p (src, dst))
 		continue;
 
+	      if (match.commutative[op_no] >= 0)
+		{
+		  rtx comm = recog_data.operand[match.commutative[op_no]];
+		  if (operands_match_p (comm, dst))
+		    continue;
+		}
+
 	      set = single_set (insn);
 	      if (! set)
 		continue;
@@ -1330,7 +1338,7 @@ regmove_optimize (f, nregs, regmove_dump_file)
 		continue;
 
 	      /* Make sure match_no is the destination.  */
-	      if (recog_operand[match_no] != SET_DEST (set))
+	      if (recog_data.operand[match_no] != SET_DEST (set))
 		continue;
 
 	      if (REGNO (src) < FIRST_PSEUDO_REGISTER)
@@ -1450,7 +1458,7 @@ regmove_optimize (f, nregs, regmove_dump_file)
 			      validate_replace_rtx (dst, src, insn);
 			      /* Now make sure the dst is right.  */
 			      validate_change (insn,
-					       recog_operand_loc[match_no],
+					       recog_data.operand_loc[match_no],
 					       dst, 0);
 			    }
 			}
@@ -1582,16 +1590,16 @@ find_matches (insn, matchp)
   /* Must initialize this before main loop, because the code for
      the commutative case may set matches for operands other than
      the current one.  */
-  for (op_no = recog_n_operands; --op_no >= 0; )
+  for (op_no = recog_data.n_operands; --op_no >= 0; )
     matchp->with[op_no] = matchp->commutative[op_no] = -1;
 
-  for (op_no = 0; op_no < recog_n_operands; op_no++)
+  for (op_no = 0; op_no < recog_data.n_operands; op_no++)
     {
       const char *p;
       char c;
       int i = 0;
 
-      p = recog_constraints[op_no];
+      p = recog_data.constraints[op_no];
 
       likely_spilled[op_no] = 0;
       matchp->use[op_no] = READ;
@@ -1841,7 +1849,7 @@ fixup_match_1 (insn, set, src, src_subreg, dst, backward, operand_number,
 	      validate_change (q, &XEXP (SET_SRC (set2), 1),
 			       GEN_INT (newconst), 1);
 	    }
-	  validate_change (insn, recog_operand_loc[match_number], src, 1);
+	  validate_change (insn, recog_data.operand_loc[match_number], src, 1);
 	  if (validate_replace_rtx (dst, src_subreg, p))
 	    success = 1;
 	  break;
diff --git a/gcc/reload.c b/gcc/reload.c
index 93ca143..d8afc6e 100644
--- a/gcc/reload.c
+++ b/gcc/reload.c
@@ -2515,8 +2515,8 @@ find_reloads (insn, replace, ind_levels, live_known, reload_reg_p)
 
   extract_insn (insn);
 
-  noperands = reload_n_operands = recog_n_operands;
-  n_alternatives = recog_n_alternatives;
+  noperands = reload_n_operands = recog_data.n_operands;
+  n_alternatives = recog_data.n_alternatives;
 
   /* Just return "no reloads" if insn has no operands with constraints.  */
   if (noperands == 0 || n_alternatives == 0)
@@ -2525,9 +2525,9 @@ find_reloads (insn, replace, ind_levels, live_known, reload_reg_p)
   insn_code_number = INSN_CODE (insn);
   this_insn_is_asm = insn_code_number < 0;
 
-  bcopy ((char *) recog_operand_mode, (char *) operand_mode,
+  bcopy ((char *) recog_data.operand_mode, (char *) operand_mode,
 	 noperands * sizeof (enum machine_mode));
-  bcopy ((char *) recog_constraints, (char *) constraints,
+  bcopy ((char *) recog_data.constraints, (char *) constraints,
 	 noperands * sizeof (char *));
 
   commutative = -1;
@@ -2542,7 +2542,7 @@ find_reloads (insn, replace, ind_levels, live_known, reload_reg_p)
       register char *p;
       register int c;
 
-      substed_operand[i] = recog_operand[i];
+      substed_operand[i] = recog_data.operand[i];
       p = constraints[i];
 
       modified[i] = RELOAD_READ;
@@ -2568,7 +2568,8 @@ find_reloads (insn, replace, ind_levels, live_known, reload_reg_p)
 	    {
 	      c -= '0';
 	      operands_match[c][i]
-		= operands_match_p (recog_operand[c], recog_operand[i]);
+		= operands_match_p (recog_data.operand[c],
+				    recog_data.operand[i]);
 
 	      /* An operand may not match itself.  */
 	      if (c == i)
@@ -2582,13 +2583,15 @@ find_reloads (insn, replace, ind_levels, live_known, reload_reg_p)
 		    {
 		      int other = c + (c == commutative ? 1 : -1);
 		      operands_match[other][i]
-			= operands_match_p (recog_operand[other], recog_operand[i]);
+			= operands_match_p (recog_data.operand[other],
+					    recog_data.operand[i]);
 		    }
 		  if (i == commutative || i == commutative + 1)
 		    {
 		      int other = i + (i == commutative ? 1 : -1);
 		      operands_match[c][other]
-			= operands_match_p (recog_operand[c], recog_operand[other]);
+			= operands_match_p (recog_data.operand[c],
+					    recog_data.operand[other]);
 		    }
 		  /* Note that C is supposed to be less than I.
 		     No need to consider altering both C and I because in
@@ -2608,7 +2611,7 @@ find_reloads (insn, replace, ind_levels, live_known, reload_reg_p)
 
   for (i = 0; i < noperands; i++)
     {
-      register RTX_CODE code = GET_CODE (recog_operand[i]);
+      register RTX_CODE code = GET_CODE (recog_data.operand[i]);
 
       address_reloaded[i] = 0;
       operand_type[i] = (modified[i] == RELOAD_READ ? RELOAD_FOR_INPUT
@@ -2625,15 +2628,16 @@ find_reloads (insn, replace, ind_levels, live_known, reload_reg_p)
       else if (constraints[i][0] == 'p')
 	{
 	  find_reloads_address (VOIDmode, NULL_PTR,
-				recog_operand[i], recog_operand_loc[i],
+				recog_data.operand[i],
+				recog_data.operand_loc[i],
 				i, operand_type[i], ind_levels, insn);
 
 	  /* If we now have a simple operand where we used to have a
 	     PLUS or MULT, re-recognize and try again.  */
-	  if ((GET_RTX_CLASS (GET_CODE (*recog_operand_loc[i])) == 'o'
-	       || GET_CODE (*recog_operand_loc[i]) == SUBREG)
-	      && (GET_CODE (recog_operand[i]) == MULT
-		  || GET_CODE (recog_operand[i]) == PLUS))
+	  if ((GET_RTX_CLASS (GET_CODE (*recog_data.operand_loc[i])) == 'o'
+	       || GET_CODE (*recog_data.operand_loc[i]) == SUBREG)
+	      && (GET_CODE (recog_data.operand[i]) == MULT
+		  || GET_CODE (recog_data.operand[i]) == PLUS))
 	    {
 	      INSN_CODE (insn) = -1;
 	      retval = find_reloads (insn, replace, ind_levels, live_known,
@@ -2641,26 +2645,28 @@ find_reloads (insn, replace, ind_levels, live_known, reload_reg_p)
 	      return retval;
 	    }
 
-	  substed_operand[i] = recog_operand[i] = *recog_operand_loc[i];
+	  recog_data.operand[i] = *recog_data.operand_loc[i];
+	  substed_operand[i] = recog_data.operand[i];
 	}
       else if (code == MEM)
 	{
 	  address_reloaded[i]
-	    = find_reloads_address (GET_MODE (recog_operand[i]),
-				    recog_operand_loc[i],
-				    XEXP (recog_operand[i], 0),
-				    &XEXP (recog_operand[i], 0),
+	    = find_reloads_address (GET_MODE (recog_data.operand[i]),
+				    recog_data.operand_loc[i],
+				    XEXP (recog_data.operand[i], 0),
+				    &XEXP (recog_data.operand[i], 0),
 				    i, address_type[i], ind_levels, insn);
-	  substed_operand[i] = recog_operand[i] = *recog_operand_loc[i];
+	  recog_data.operand[i] = *recog_data.operand_loc[i];
+	  substed_operand[i] = recog_data.operand[i];
 	}
       else if (code == SUBREG)
 	{
-	  rtx reg = SUBREG_REG (recog_operand[i]);
+	  rtx reg = SUBREG_REG (recog_data.operand[i]);
 	  rtx op
-	    = find_reloads_toplev (recog_operand[i], i, address_type[i],
+	    = find_reloads_toplev (recog_data.operand[i], i, address_type[i],
 				   ind_levels,
 				   set != 0
-				   && &SET_DEST (set) == recog_operand_loc[i],
+				   && &SET_DEST (set) == recog_data.operand_loc[i],
 				   insn);
 
 	  /* If we made a MEM to load (a part of) the stackslot of a pseudo
@@ -2677,14 +2683,14 @@ find_reloads (insn, replace, ind_levels, live_known, reload_reg_p)
 	      = gen_rtx_EXPR_LIST (REG_EQUAL,
 				   reg_equiv_memory_loc[REGNO (reg)], NULL_RTX);
 
-	  substed_operand[i] = recog_operand[i] = op;
+	  substed_operand[i] = recog_data.operand[i] = op;
 	}
       else if (code == PLUS || GET_RTX_CLASS (code) == '1')
 	/* We can get a PLUS as an "operand" as a result of register
 	   elimination.  See eliminate_regs and gen_reload.  We handle
 	   a unary operator by reloading the operand.  */
-	substed_operand[i] = recog_operand[i]
-	  = find_reloads_toplev (recog_operand[i], i, address_type[i],
+	substed_operand[i] = recog_data.operand[i]
+	  = find_reloads_toplev (recog_data.operand[i], i, address_type[i],
 				 ind_levels, 0, insn);
       else if (code == REG)
 	{
@@ -2694,36 +2700,39 @@ find_reloads (insn, replace, ind_levels, live_known, reload_reg_p)
 	     we replace it by the constant.  We must be sure, however,
 	     that we don't try to replace it in the insn in which it
 	     is being set.   */
-	  register int regno = REGNO (recog_operand[i]);
+	  register int regno = REGNO (recog_data.operand[i]);
 	  if (reg_equiv_constant[regno] != 0
-	      && (set == 0 || &SET_DEST (set) != recog_operand_loc[i]))
+	      && (set == 0 || &SET_DEST (set) != recog_data.operand_loc[i]))
 	    {
 	      /* Record the existing mode so that the check if constants are
 		 allowed will work when operand_mode isn't specified. */
 
 	      if (operand_mode[i] == VOIDmode)
-		operand_mode[i] = GET_MODE (recog_operand[i]);
+		operand_mode[i] = GET_MODE (recog_data.operand[i]);
 
-	      substed_operand[i] = recog_operand[i]
+	      substed_operand[i] = recog_data.operand[i]
 		= reg_equiv_constant[regno];
 	    }
 	  if (reg_equiv_memory_loc[regno] != 0
 	      && (reg_equiv_address[regno] != 0 || num_not_at_initial_offset))
 	    /* We need not give a valid is_set_dest argument since the case
 	       of a constant equivalence was checked above.  */
-	    substed_operand[i] = recog_operand[i]
-	      = find_reloads_toplev (recog_operand[i], i, address_type[i],
+	    substed_operand[i] = recog_data.operand[i]
+	      = find_reloads_toplev (recog_data.operand[i], i, address_type[i],
 				     ind_levels, 0, insn);
 	}
       /* If the operand is still a register (we didn't replace it with an
 	 equivalent), get the preferred class to reload it into.  */
-      code = GET_CODE (recog_operand[i]);
+      code = GET_CODE (recog_data.operand[i]);
       preferred_class[i]
-	= ((code == REG && REGNO (recog_operand[i]) >= FIRST_PSEUDO_REGISTER)
-	   ? reg_preferred_class (REGNO (recog_operand[i])) : NO_REGS);
+	= ((code == REG && REGNO (recog_data.operand[i])
+	    >= FIRST_PSEUDO_REGISTER)
+	   ? reg_preferred_class (REGNO (recog_data.operand[i]))
+	   : NO_REGS);
       pref_or_nothing[i]
-	= (code == REG && REGNO (recog_operand[i]) >= FIRST_PSEUDO_REGISTER
-	   && reg_alternate_class (REGNO (recog_operand[i])) == NO_REGS);
+	= (code == REG
+	   && REGNO (recog_data.operand[i]) >= FIRST_PSEUDO_REGISTER
+	   && reg_alternate_class (REGNO (recog_data.operand[i])) == NO_REGS);
     }
 
 #ifdef HAVE_cc0
@@ -2737,8 +2746,8 @@ find_reloads (insn, replace, ind_levels, live_known, reload_reg_p)
 
   /* If this is simply a copy from operand 1 to operand 0, merge the
      preferred classes for the operands.  */
-  if (set != 0 && noperands >= 2 && recog_operand[0] == SET_DEST (set)
-      && recog_operand[1] == SET_SRC (set))
+  if (set != 0 && noperands >= 2 && recog_data.operand[0] == SET_DEST (set)
+      && recog_data.operand[1] == SET_SRC (set))
     {
       preferred_class[0] = preferred_class[1]
 	= reg_class_subunion[(int) preferred_class[0]][(int) preferred_class[1]];
@@ -2793,7 +2802,7 @@ find_reloads (insn, replace, ind_levels, live_known, reload_reg_p)
 	  /* 0 => this operand can be reloaded if the alternative allows regs.  */
 	  int winreg = 0;
 	  int c;
-	  register rtx operand = recog_operand[i];
+	  register rtx operand = recog_data.operand[i];
 	  int offset = 0;
 	  /* Nonzero means this is a MEM that must be reloaded into a reg
 	     regardless of what the constraint says.  */
@@ -2958,7 +2967,7 @@ find_reloads (insn, replace, ind_levels, live_known, reload_reg_p)
 		       offsettable address was expected, then we must reject
 		       this combination, because we can't reload it.  */
 		    if (this_alternative_offmemok[c]
-			&& GET_CODE (recog_operand[c]) == MEM
+			&& GET_CODE (recog_data.operand[c]) == MEM
 			&& this_alternative[c] == (int) NO_REGS
 			&& ! this_alternative_win[c])
 		      bad = 1;
@@ -2979,8 +2988,10 @@ find_reloads (insn, replace, ind_levels, live_known, reload_reg_p)
 		    /* But count the pair only once in the total badness of
 		       this alternative, if the pair can be a dummy reload.  */
 		    value
-		      = find_dummy_reload (recog_operand[i], recog_operand[c],
-					   recog_operand_loc[i], recog_operand_loc[c],
+		      = find_dummy_reload (recog_data.operand[i],
+					   recog_data.operand[c],
+					   recog_data.operand_loc[i],
+					   recog_data.operand_loc[c],
 					   operand_mode[i], operand_mode[c],
 					   this_alternative[c], -1,
 					   this_alternative_earlyclobber[c]);
@@ -3206,7 +3217,7 @@ find_reloads (insn, replace, ind_levels, live_known, reload_reg_p)
 		winreg = 1;
 		if (GET_CODE (operand) == REG
 		    && reg_fits_class_p (operand, this_alternative[i],
-					 offset, GET_MODE (recog_operand[i])))
+					 offset, GET_MODE (recog_data.operand[i])))
 		  win = 1;
 		break;
 	      }
@@ -3355,7 +3366,7 @@ find_reloads (insn, replace, ind_levels, live_known, reload_reg_p)
 	  {
 	    struct decomposition early_data;
 
-	    early_data = decompose (recog_operand[i]);
+	    early_data = decompose (recog_data.operand[i]);
 
 	    if (modified[i] == RELOAD_READ)
 	      abort ();
@@ -3372,23 +3383,25 @@ find_reloads (insn, replace, ind_levels, live_known, reload_reg_p)
 
 	    for (j = 0; j < noperands; j++)
 	      /* Is this an input operand or a memory ref?  */
-	      if ((GET_CODE (recog_operand[j]) == MEM
+	      if ((GET_CODE (recog_data.operand[j]) == MEM
 		   || modified[j] != RELOAD_WRITE)
 		  && j != i
 		  /* Ignore things like match_operator operands.  */
-		  && *recog_constraints[j] != 0
+		  && *recog_data.constraints[j] != 0
 		  /* Don't count an input operand that is constrained to match
 		     the early clobber operand.  */
 		  && ! (this_alternative_matches[j] == i
-			&& rtx_equal_p (recog_operand[i], recog_operand[j]))
+			&& rtx_equal_p (recog_data.operand[i],
+					recog_data.operand[j]))
 		  /* Is it altered by storing the earlyclobber operand?  */
-		  && !immune_p (recog_operand[j], recog_operand[i], early_data))
+		  && !immune_p (recog_data.operand[j], recog_data.operand[i],
+				early_data))
 		{
 		  /* If the output is in a single-reg class,
 		     it's costly to reload it, so reload the input instead.  */
 		  if (reg_class_size[this_alternative[i]] == 1
-		      && (GET_CODE (recog_operand[j]) == REG
-			  || GET_CODE (recog_operand[j]) == SUBREG))
+		      && (GET_CODE (recog_data.operand[j]) == REG
+			  || GET_CODE (recog_data.operand[j]) == SUBREG))
 		    {
 		      losers++;
 		      this_alternative_win[j] = 0;
@@ -3419,8 +3432,8 @@ find_reloads (insn, replace, ind_levels, live_known, reload_reg_p)
 	  /* Unswap these so that they are never swapped at `finish'.  */
 	  if (commutative >= 0)
 	    {
-	      recog_operand[commutative] = substed_operand[commutative];
-	      recog_operand[commutative + 1]
+	      recog_data.operand[commutative] = substed_operand[commutative];
+	      recog_data.operand[commutative + 1]
 		= substed_operand[commutative + 1];
 	    }
 	  for (i = 0; i < noperands; i++)
@@ -3482,8 +3495,8 @@ find_reloads (insn, replace, ind_levels, live_known, reload_reg_p)
 	  register enum reg_class tclass;
 	  register int t;
 
-	  recog_operand[commutative] = substed_operand[commutative + 1];
-	  recog_operand[commutative + 1] = substed_operand[commutative];
+	  recog_data.operand[commutative] = substed_operand[commutative + 1];
+	  recog_data.operand[commutative + 1] = substed_operand[commutative];
 
 	  tclass = preferred_class[commutative];
 	  preferred_class[commutative] = preferred_class[commutative + 1];
@@ -3493,14 +3506,15 @@ find_reloads (insn, replace, ind_levels, live_known, reload_reg_p)
 	  pref_or_nothing[commutative] = pref_or_nothing[commutative + 1];
 	  pref_or_nothing[commutative + 1] = t;
 
-	  bcopy ((char *) recog_constraints, (char *) constraints,
+	  bcopy ((char *) recog_data.constraints, (char *) constraints,
 		 noperands * sizeof (char *));
 	  goto try_swapped;
 	}
       else
 	{
-	  recog_operand[commutative] = substed_operand[commutative];
-	  recog_operand[commutative + 1] = substed_operand[commutative + 1];
+	  recog_data.operand[commutative] = substed_operand[commutative];
+	  recog_data.operand[commutative + 1]
+	    = substed_operand[commutative + 1];
 	}
     }
 
@@ -3550,12 +3564,13 @@ find_reloads (insn, replace, ind_levels, live_known, reload_reg_p)
       tem = substed_operand[commutative];
       substed_operand[commutative] = substed_operand[commutative + 1];
       substed_operand[commutative + 1] = tem;
-      tem = recog_operand[commutative];
-      recog_operand[commutative] = recog_operand[commutative + 1];
-      recog_operand[commutative + 1] = tem;
-      tem = *recog_operand_loc[commutative];
-      *recog_operand_loc[commutative] = *recog_operand_loc[commutative+1];
-      *recog_operand_loc[commutative+1] = tem;
+      tem = recog_data.operand[commutative];
+      recog_data.operand[commutative] = recog_data.operand[commutative + 1];
+      recog_data.operand[commutative + 1] = tem;
+      tem = *recog_data.operand_loc[commutative];
+      *recog_data.operand_loc[commutative]
+	= *recog_data.operand_loc[commutative + 1];
+      *recog_data.operand_loc[commutative+1] = tem;
 
       for (i = 0; i < n_reloads; i++)
 	{
@@ -3589,7 +3604,7 @@ find_reloads (insn, replace, ind_levels, live_known, reload_reg_p)
 
       if (goal_alternative_earlyclobber[i] && operand_type[i] != RELOAD_OTHER)
 	operand_type[i]
-	  = (find_reg_note (insn, REG_UNUSED, recog_operand[i])
+	  = (find_reg_note (insn, REG_UNUSED, recog_data.operand[i])
 	     ? RELOAD_FOR_INSN : RELOAD_OTHER);
     }
 
@@ -3597,20 +3612,20 @@ find_reloads (insn, replace, ind_levels, live_known, reload_reg_p)
      into registers are here changed into memory references.  */
   for (i = 0; i < noperands; i++)
     if (! goal_alternative_win[i]
-	&& CONSTANT_P (recog_operand[i])
+	&& CONSTANT_P (recog_data.operand[i])
 	/* force_const_mem does not accept HIGH.  */
-	&& GET_CODE (recog_operand[i]) != HIGH
-	&& ((PREFERRED_RELOAD_CLASS (recog_operand[i],
+	&& GET_CODE (recog_data.operand[i]) != HIGH
+	&& ((PREFERRED_RELOAD_CLASS (recog_data.operand[i],
 				     (enum reg_class) goal_alternative[i])
 	     == NO_REGS)
 	    || no_input_reloads)
 	&& operand_mode[i] != VOIDmode)
       {
-	substed_operand[i] = recog_operand[i]
+	substed_operand[i] = recog_data.operand[i]
 	  = find_reloads_toplev (force_const_mem (operand_mode[i],
-						  recog_operand[i]),
+						  recog_data.operand[i]),
 				 i, address_type[i], ind_levels, 0, insn);
-	if (alternative_allows_memconst (recog_constraints[i],
+	if (alternative_allows_memconst (recog_data.constraints[i],
 					 goal_alternative_number))
 	  goal_alternative_win[i] = 1;
       }
@@ -3619,7 +3634,7 @@ find_reloads (insn, replace, ind_levels, live_known, reload_reg_p)
   if (goal_earlyclobber)
     for (i = 0; i < noperands; i++)
       if (goal_alternative_earlyclobber[i])
-	reload_earlyclobbers[n_earlyclobbers++] = recog_operand[i];
+	reload_earlyclobbers[n_earlyclobbers++] = recog_data.operand[i];
 
   /* Now record reloads for all the operands that need them.  */
   for (i = 0; i < noperands; i++)
@@ -3637,15 +3652,16 @@ find_reloads (insn, replace, ind_levels, live_known, reload_reg_p)
 	   so we don't bother with it.  It may not be worth doing.  */
 	else if (goal_alternative_matched[i] == -1
 		 && goal_alternative_offmemok[i]
-		 && GET_CODE (recog_operand[i]) == MEM)
+		 && GET_CODE (recog_data.operand[i]) == MEM)
 	  {
 	    operand_reloadnum[i]
-	      = push_reload (XEXP (recog_operand[i], 0), NULL_RTX,
-			     &XEXP (recog_operand[i], 0), NULL_PTR,
-			     BASE_REG_CLASS, GET_MODE (XEXP (recog_operand[i], 0)),
+	      = push_reload (XEXP (recog_data.operand[i], 0), NULL_RTX,
+			     &XEXP (recog_data.operand[i], 0), NULL_PTR,
+			     BASE_REG_CLASS,
+			     GET_MODE (XEXP (recog_data.operand[i], 0)),
 			     VOIDmode, 0, 0, i, RELOAD_FOR_INPUT);
 	    reload_inc[operand_reloadnum[i]]
-	      = GET_MODE_SIZE (GET_MODE (recog_operand[i]));
+	      = GET_MODE_SIZE (GET_MODE (recog_data.operand[i]));
 
 	    /* If this operand is an output, we will have made any
 	       reloads for its address as RELOAD_FOR_OUTPUT_ADDRESS, but
@@ -3671,12 +3687,13 @@ find_reloads (insn, replace, ind_levels, live_known, reload_reg_p)
 	  {
 	    operand_reloadnum[i]
 	      = push_reload ((modified[i] != RELOAD_WRITE
-			      ? recog_operand[i] : 0),
-			     modified[i] != RELOAD_READ ? recog_operand[i] : 0,
+			      ? recog_data.operand[i] : 0),
+			     (modified[i] != RELOAD_READ
+			      ? recog_data.operand[i] : 0),
 			     (modified[i] != RELOAD_WRITE
-			      ? recog_operand_loc[i] : 0),
+			      ? recog_data.operand_loc[i] : 0),
 			     (modified[i] != RELOAD_READ
-			      ? recog_operand_loc[i] : 0),
+			      ? recog_data.operand_loc[i] : 0),
 			     (enum reg_class) goal_alternative[i],
 			     (modified[i] == RELOAD_WRITE
 			      ? VOIDmode : operand_mode[i]),
@@ -3693,10 +3710,10 @@ find_reloads (insn, replace, ind_levels, live_known, reload_reg_p)
 		 && modified[goal_alternative_matched[i]] == RELOAD_WRITE)
 	  {
 	    operand_reloadnum[i]
-	      = push_reload (recog_operand[i],
-			     recog_operand[goal_alternative_matched[i]],
-			     recog_operand_loc[i],
-			     recog_operand_loc[goal_alternative_matched[i]],
+	      = push_reload (recog_data.operand[i],
+			     recog_data.operand[goal_alternative_matched[i]],
+			     recog_data.operand_loc[i],
+			     recog_data.operand_loc[goal_alternative_matched[i]],
 			     (enum reg_class) goal_alternative[i],
 			     operand_mode[i],
 			     operand_mode[goal_alternative_matched[i]],
@@ -3707,10 +3724,10 @@ find_reloads (insn, replace, ind_levels, live_known, reload_reg_p)
 		 && modified[goal_alternative_matched[i]] == RELOAD_READ)
 	  {
 	    operand_reloadnum[goal_alternative_matched[i]]
-	      = push_reload (recog_operand[goal_alternative_matched[i]],
-			     recog_operand[i],
-			     recog_operand_loc[goal_alternative_matched[i]],
-			     recog_operand_loc[i],
+	      = push_reload (recog_data.operand[goal_alternative_matched[i]],
+			     recog_data.operand[i],
+			     recog_data.operand_loc[goal_alternative_matched[i]],
+			     recog_data.operand_loc[i],
 			     (enum reg_class) goal_alternative[i],
 			     operand_mode[goal_alternative_matched[i]],
 			     operand_mode[i],
@@ -3736,7 +3753,7 @@ find_reloads (insn, replace, ind_levels, live_known, reload_reg_p)
 	   that didn't get a hard register, make an optional reload.
 	   This may get done even if the insn needs no reloads otherwise.  */
 
-	rtx operand = recog_operand[i];
+	rtx operand = recog_data.operand[i];
 
 	while (GET_CODE (operand) == SUBREG)
 	  operand = XEXP (operand, 0);
@@ -3759,12 +3776,14 @@ find_reloads (insn, replace, ind_levels, live_known, reload_reg_p)
 	    && (modified[i] == RELOAD_READ
 		|| (! no_output_reloads && ! this_insn_is_asm)))
 	  operand_reloadnum[i]
-	    = push_reload (modified[i] != RELOAD_WRITE ? recog_operand[i] : 0,
-			   modified[i] != RELOAD_READ ? recog_operand[i] : 0,
+	    = push_reload ((modified[i] != RELOAD_WRITE
+			    ? recog_data.operand[i] : 0),
+			   (modified[i] != RELOAD_READ
+			    ? recog_data.operand[i] : 0),
 			   (modified[i] != RELOAD_WRITE
-			    ? recog_operand_loc[i] : 0),
+			    ? recog_data.operand_loc[i] : 0),
 			   (modified[i] != RELOAD_READ
-			    ? recog_operand_loc[i] : 0),
+			    ? recog_data.operand_loc[i] : 0),
 			   (enum reg_class) goal_alternative[i],
 			   (modified[i] == RELOAD_WRITE
 			    ? VOIDmode : operand_mode[i]),
@@ -3784,7 +3803,7 @@ find_reloads (insn, replace, ind_levels, live_known, reload_reg_p)
 			 && REGNO (operand) >= FIRST_PSEUDO_REGISTER
 			 && reg_renumber [REGNO (operand)] < 0)))
 	  {
-	    operand = *recog_operand_loc[i];
+	    operand = *recog_data.operand_loc[i];
 
 	    while (GET_CODE (operand) == SUBREG)
 	      operand = XEXP (operand, 0);
@@ -3807,7 +3826,7 @@ find_reloads (insn, replace, ind_levels, live_known, reload_reg_p)
 	/* Similarly, make an optional reload for a pair of matching
 	   objects that are in MEM or a pseudo that didn't get a hard reg.  */
 
-	rtx operand = recog_operand[i];
+	rtx operand = recog_data.operand[i];
 
 	while (GET_CODE (operand) == SUBREG)
 	  operand = XEXP (operand, 0);
@@ -3817,10 +3836,10 @@ find_reloads (insn, replace, ind_levels, live_known, reload_reg_p)
 	    && ((enum reg_class) goal_alternative[goal_alternative_matches[i]]
 		!= NO_REGS))
 	  operand_reloadnum[i] = operand_reloadnum[goal_alternative_matches[i]]
-	    = push_reload (recog_operand[goal_alternative_matches[i]],
-			   recog_operand[i],
-			   recog_operand_loc[goal_alternative_matches[i]],
-			   recog_operand_loc[i],
+	    = push_reload (recog_data.operand[goal_alternative_matches[i]],
+			   recog_data.operand[i],
+			   recog_data.operand_loc[goal_alternative_matches[i]],
+			   recog_data.operand_loc[i],
 			   (enum reg_class) goal_alternative[goal_alternative_matches[i]],
 			   operand_mode[goal_alternative_matches[i]],
 			   operand_mode[i],
@@ -3842,7 +3861,7 @@ find_reloads (insn, replace, ind_levels, live_known, reload_reg_p)
 	{
 	  rtx substitution = substed_operand[i];
 
-	  *recog_operand_loc[i] = substitution;
+	  *recog_data.operand_loc[i] = substitution;
 
 	  /* If we're replacing an operand with a LABEL_REF, we need
 	     to make sure that there's a REG_LABEL note attached to
@@ -3855,7 +3874,7 @@ find_reloads (insn, replace, ind_levels, live_known, reload_reg_p)
 						  REG_NOTES (insn));
 	}
       else
-	retval |= (substed_operand[i] != *recog_operand_loc[i]);
+	retval |= (substed_operand[i] != *recog_data.operand_loc[i]);
     }
 
   /* If this insn pattern contains any MATCH_DUP's, make sure that
@@ -3869,10 +3888,10 @@ find_reloads (insn, replace, ind_levels, live_known, reload_reg_p)
   if (insn_code_number >= 0 && replace)
     for (i = insn_n_dups[insn_code_number] - 1; i >= 0; i--)
       {
-	int opno = recog_dup_num[i];
-	*recog_dup_loc[i] = *recog_operand_loc[opno];
+	int opno = recog_data.dup_num[i];
+	*recog_data.dup_loc[i] = *recog_data.operand_loc[opno];
 	if (operand_reloadnum[opno] >= 0)
-	  push_replacement (recog_dup_loc[i], operand_reloadnum[opno],
+	  push_replacement (recog_data.dup_loc[i], operand_reloadnum[opno],
 			    insn_operand_mode[insn_code_number][opno]);
       }
 
@@ -4243,7 +4262,7 @@ find_reloads (insn, replace, ind_levels, live_known, reload_reg_p)
 
   extract_insn (insn);
 
-  noperands = reload_n_operands = recog_n_operands;
+  noperands = reload_n_operands = recog_data.n_operands;
 
   /* Return if the insn needs no reload processing.  */
   if (noperands == 0)
@@ -4251,13 +4270,14 @@ find_reloads (insn, replace, ind_levels, live_known, reload_reg_p)
 
   for (i = 0; i < noperands; i++)
     {
-      register RTX_CODE code = GET_CODE (recog_operand[i]);
+      register RTX_CODE code = GET_CODE (recog_data.operand[i]);
       int is_set_dest = GET_CODE (body) == SET && (i == 0);
 
       if (insn_code_number >= 0)
 	if (insn_operand_address_p[insn_code_number][i])
 	  find_reloads_address (VOIDmode, NULL_PTR,
-				recog_operand[i], recog_operand_loc[i],
+				recog_data.operand[i],
+				recog_data.operand_loc[i],
 				i, RELOAD_FOR_INPUT, ind_levels, insn);
 
       /* In these cases, we can't tell if the operand is an input
@@ -4265,25 +4285,25 @@ find_reloads (insn, replace, ind_levels, live_known, reload_reg_p)
 	 problem.  */
 
       if (code == MEM)
-	find_reloads_address (GET_MODE (recog_operand[i]),
-			      recog_operand_loc[i],
-			      XEXP (recog_operand[i], 0),
-			      &XEXP (recog_operand[i], 0),
+	find_reloads_address (GET_MODE (recog_data.operand[i]),
+			      recog_data.operand_loc[i],
+			      XEXP (recog_data.operand[i], 0),
+			      &XEXP (recog_data.operand[i], 0),
 			      i, RELOAD_OTHER, ind_levels, insn);
       if (code == SUBREG)
-	recog_operand[i] = *recog_operand_loc[i]
-	  = find_reloads_toplev (recog_operand[i], i, RELOAD_OTHER,
+	recog_data.operand[i] = *recog_data.operand_loc[i]
+	  = find_reloads_toplev (recog_data.operand[i], i, RELOAD_OTHER,
 				 ind_levels, is_set_dest);
       if (code == REG)
 	{
-	  register int regno = REGNO (recog_operand[i]);
+	  register int regno = REGNO (recog_data.operand[i]);
 	  if (reg_equiv_constant[regno] != 0 && !is_set_dest)
-	    recog_operand[i] = *recog_operand_loc[i]
+	    recog_data.operand[i] = *recog_data.operand_loc[i]
 	      = reg_equiv_constant[regno];
 #if 0 /* This might screw code in reload1.c to delete prior output-reload
 	 that feeds this insn.  */
 	  if (reg_equiv_mem[regno] != 0)
-	    recog_operand[i] = *recog_operand_loc[i]
+	    recog_data.operand[i] = *recog_data.operand_loc[i]
 	      = reg_equiv_mem[regno];
 #endif
 	}
@@ -4376,7 +4396,7 @@ find_reloads_toplev (x, opnum, type, ind_levels, is_set_dest, insn)
 	      /* If this is not a toplevel operand, find_reloads doesn't see
 		 this substitution.  We have to emit a USE of the pseudo so
 		 that delete_output_reload can see it.  */
-	      if (replace_reloads && recog_operand[opnum] != x)
+	      if (replace_reloads && recog_data.operand[opnum] != x)
 		emit_insn_before (gen_rtx_USE (VOIDmode, x), insn);
 	      x = mem;
 	      find_reloads_address (GET_MODE (x), &x, XEXP (x, 0), &XEXP (x, 0),
@@ -5677,7 +5697,7 @@ find_reloads_subreg_address (x, force_replace, opnum, type,
 	      /* If this is not a toplevel operand, find_reloads doesn't see
 		 this substitution.  We have to emit a USE of the pseudo so
 		 that delete_output_reload can see it.  */
-	      if (replace_reloads && recog_operand[opnum] != x)
+	      if (replace_reloads && recog_data.operand[opnum] != x)
 		emit_insn_before (gen_rtx_USE (VOIDmode, SUBREG_REG (x)), insn);
 	      x = tem;
 	    }
diff --git a/gcc/reload1.c b/gcc/reload1.c
index 915a9a0..c8a914a 100644
--- a/gcc/reload1.c
+++ b/gcc/reload1.c
@@ -1264,7 +1264,7 @@ maybe_fix_stack_asms ()
 	}
 
       /* Get the operand values and constraints out of the insn.  */
-      decode_asm_operands (pat, recog_operand, recog_operand_loc,
+      decode_asm_operands (pat, recog_data.operand, recog_data.operand_loc,
 			   constraints, operand_mode);
 
       /* For every operand, see what registers are allowed.  */
@@ -3442,13 +3442,13 @@ eliminate_regs_in_insn (insn, replace)
 	       && (GET_CODE (new_body) != SET
 		   || GET_CODE (SET_SRC (new_body)) != REG))
 	      /* If this was a load from or store to memory, compare
-		 the MEM in recog_operand to the one in the insn.  If they
-		 are not equal, then rerecognize the insn.  */
+		 the MEM in recog_data.operand to the one in the insn.
+		 If they are not equal, then rerecognize the insn.  */
 	      || (old_set != 0
 		  && ((GET_CODE (SET_SRC (old_set)) == MEM
-		       && SET_SRC (old_set) != recog_operand[1])
+		       && SET_SRC (old_set) != recog_data.operand[1])
 		      || (GET_CODE (SET_DEST (old_set)) == MEM
-			  && SET_DEST (old_set) != recog_operand[0])))
+			  && SET_DEST (old_set) != recog_data.operand[0])))
 	      /* If this was an add insn before, rerecognize.  */
 	      || GET_CODE (SET_SRC (old_set)) == PLUS))
 	{
@@ -9155,31 +9155,31 @@ reload_cse_simplify_operands (insn)
 
   extract_insn (insn);
 
-  if (recog_n_alternatives == 0 || recog_n_operands == 0)
+  if (recog_data.n_alternatives == 0 || recog_data.n_operands == 0)
     return 0;
 
   /* Figure out which alternative currently matches.  */
   if (! constrain_operands (1))
     fatal_insn_not_found (insn);
 
-  alternative_reject = (int *) alloca (recog_n_alternatives * sizeof (int));
-  alternative_nregs = (int *) alloca (recog_n_alternatives * sizeof (int));
-  alternative_order = (int *) alloca (recog_n_alternatives * sizeof (int));
-  bzero ((char *)alternative_reject, recog_n_alternatives * sizeof (int));
-  bzero ((char *)alternative_nregs, recog_n_alternatives * sizeof (int));
+  alternative_reject = (int *) alloca (recog_data.n_alternatives * sizeof (int));
+  alternative_nregs = (int *) alloca (recog_data.n_alternatives * sizeof (int));
+  alternative_order = (int *) alloca (recog_data.n_alternatives * sizeof (int));
+  bzero ((char *)alternative_reject, recog_data.n_alternatives * sizeof (int));
+  bzero ((char *)alternative_nregs, recog_data.n_alternatives * sizeof (int));
 
-  for (i = 0; i < recog_n_operands; i++)
+  for (i = 0; i < recog_data.n_operands; i++)
     {
       enum machine_mode mode;
       int regno;
       const char *p;
 
-      op_alt_regno[i] = (int *) alloca (recog_n_alternatives * sizeof (int));
-      for (j = 0; j < recog_n_alternatives; j++)
+      op_alt_regno[i] = (int *) alloca (recog_data.n_alternatives * sizeof (int));
+      for (j = 0; j < recog_data.n_alternatives; j++)
 	op_alt_regno[i][j] = -1;
 
-      p = constraints[i] = recog_constraints[i];
-      mode = recog_operand_mode[i];
+      p = constraints[i] = recog_data.constraints[i];
+      mode = recog_data.operand_mode[i];
 
       /* Add the reject values for each alternative given by the constraints
 	 for this operand.  */
@@ -9197,7 +9197,7 @@ reload_cse_simplify_operands (insn)
 
       /* We won't change operands which are already registers.  We
 	 also don't want to modify output operands.  */
-      regno = true_regnum (recog_operand[i]);
+      regno = true_regnum (recog_data.operand[i]);
       if (regno >= 0
 	  || constraints[i][0] == '='
 	  || constraints[i][0] == '+')
@@ -9207,7 +9207,7 @@ reload_cse_simplify_operands (insn)
 	{
 	  int class = (int) NO_REGS;
 
-	  if (! reload_cse_regno_equal_p (regno, recog_operand[i], mode))
+	  if (! reload_cse_regno_equal_p (regno, recog_data.operand[i], mode))
 	    continue;
 
 	  REGNO (reg) = regno;
@@ -9257,8 +9257,9 @@ reload_cse_simplify_operands (insn)
 		     a cheap CONST_INT. */
 		  if (op_alt_regno[i][j] == -1
 		      && reg_fits_class_p (reg, class, 0, mode)
-		      && (GET_CODE (recog_operand[i]) != CONST_INT
-			  || rtx_cost (recog_operand[i], SET) > rtx_cost (reg, SET)))
+		      && (GET_CODE (recog_data.operand[i]) != CONST_INT
+			  || (rtx_cost (recog_data.operand[i], SET)
+			      > rtx_cost (reg, SET))))
 		    {
 		      alternative_nregs[j]++;
 		      op_alt_regno[i][j] = regno;
@@ -9275,21 +9276,21 @@ reload_cse_simplify_operands (insn)
 
   /* Record all alternatives which are better or equal to the currently
      matching one in the alternative_order array.  */
-  for (i = j = 0; i < recog_n_alternatives; i++)
+  for (i = j = 0; i < recog_data.n_alternatives; i++)
     if (alternative_reject[i] <= alternative_reject[which_alternative])
       alternative_order[j++] = i;
-  recog_n_alternatives = j;
+  recog_data.n_alternatives = j;
 
   /* Sort it.  Given a small number of alternatives, a dumb algorithm
      won't hurt too much.  */
-  for (i = 0; i < recog_n_alternatives - 1; i++)
+  for (i = 0; i < recog_data.n_alternatives - 1; i++)
     {
       int best = i;
       int best_reject = alternative_reject[alternative_order[i]];
       int best_nregs = alternative_nregs[alternative_order[i]];
       int tmp;
 
-      for (j = i + 1; j < recog_n_alternatives; j++)
+      for (j = i + 1; j < recog_data.n_alternatives; j++)
 	{
 	  int this_reject = alternative_reject[alternative_order[j]];
 	  int this_nregs = alternative_nregs[alternative_order[j]];
@@ -9315,25 +9316,25 @@ reload_cse_simplify_operands (insn)
   /* Pop back to the real obstacks while changing the insn.  */
   pop_obstacks ();
 
-  for (i = 0; i < recog_n_operands; i++)
+  for (i = 0; i < recog_data.n_operands; i++)
     {
-      enum machine_mode mode = recog_operand_mode[i];
+      enum machine_mode mode = recog_data.operand_mode[i];
       if (op_alt_regno[i][j] == -1)
 	continue;
 
-      validate_change (insn, recog_operand_loc[i],
+      validate_change (insn, recog_data.operand_loc[i],
 		       gen_rtx_REG (mode, op_alt_regno[i][j]), 1);
     }
 
-  for (i = recog_n_dups - 1; i >= 0; i--)
+  for (i = recog_data.n_dups - 1; i >= 0; i--)
     {
-      int op = recog_dup_num[i];
-      enum machine_mode mode = recog_operand_mode[op];
+      int op = recog_data.dup_num[i];
+      enum machine_mode mode = recog_data.operand_mode[op];
 
       if (op_alt_regno[op][j] == -1)
 	continue;
 
-      validate_change (insn, recog_dup_loc[i],
+      validate_change (insn, recog_data.dup_loc[i],
 		       gen_rtx_REG (mode, op_alt_regno[op][j]), 1);
     }