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author | Uros Bizjak <ubizjak@gmail.com> | 2022-01-14 16:05:17 +0100 |
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committer | Uros Bizjak <ubizjak@gmail.com> | 2022-01-14 16:06:00 +0100 |
commit | ffb7d4b2b76746e4189979f9d27d80be2195308a (patch) | |
tree | ae834a6004344ddf3af22e40d7a208f9615f5503 /gcc | |
parent | 74abb0beb420830e52dfc6b3ee74e77dae8e31a3 (diff) | |
download | gcc-ffb7d4b2b76746e4189979f9d27d80be2195308a.zip gcc-ffb7d4b2b76746e4189979f9d27d80be2195308a.tar.gz gcc-ffb7d4b2b76746e4189979f9d27d80be2195308a.tar.bz2 |
i386: Mark some of strict_low_part insn constraints earlyclobbered
While there is practically impossible that input registers are matched
with in-out register, better mark the output operand of the split alternative
as earlyclobbered - we do output early to the output operand when
the insn is split.
2022-01-14 Uroš Bizjak <ubizjak@gmail.com>
gcc/ChangeLog:
* config/i386/i386.md (*add<mode>_1_slp"):
Mark alternative 1 output operand earlyclobbered.
(*sub<mode>_1_slp): Ditto.
(*and<mode>_1_slp): Ditto.
(*<code><mode>_1_slp): Ditto.
(*neg<mode>_1_slp): Ditto.
(*one_cmpl<mode>_1_slp): Ditto.
(*ashl<mode>3_1_slp): Ditto.
(*<insn><mode>3_1_slp): Ditto.
(*<insn><mode>3_1_slp): Ditto.
Diffstat (limited to 'gcc')
-rw-r--r-- | gcc/config/i386/i386.md | 18 |
1 files changed, 9 insertions, 9 deletions
diff --git a/gcc/config/i386/i386.md b/gcc/config/i386/i386.md index 9477ca9..7b16943 100644 --- a/gcc/config/i386/i386.md +++ b/gcc/config/i386/i386.md @@ -5902,7 +5902,7 @@ ;; Alternative 1 is needed to work around LRA limitation, see PR82524. (define_insn_and_split "*add<mode>_1_slp" - [(set (strict_low_part (match_operand:SWI12 0 "register_operand" "+<r>,<r>")) + [(set (strict_low_part (match_operand:SWI12 0 "register_operand" "+<r>,&<r>")) (plus:SWI12 (match_operand:SWI12 1 "nonimmediate_operand" "%0,!<r>") (match_operand:SWI12 2 "general_operand" "<r>mn,<r>mn"))) (clobber (reg:CC FLAGS_REG))] @@ -6856,7 +6856,7 @@ ;; Alternative 1 is needed to work around LRA limitation, see PR82524. (define_insn_and_split "*sub<mode>_1_slp" - [(set (strict_low_part (match_operand:SWI12 0 "register_operand" "+<r>,<r>")) + [(set (strict_low_part (match_operand:SWI12 0 "register_operand" "+<r>,&<r>")) (minus:SWI12 (match_operand:SWI12 1 "register_operand" "0,!<r>") (match_operand:SWI12 2 "general_operand" "<r>mn,<r>mn"))) (clobber (reg:CC FLAGS_REG))] @@ -9905,7 +9905,7 @@ ;; Alternative 1 is needed to work around LRA limitation, see PR82524. (define_insn_and_split "*and<mode>_1_slp" - [(set (strict_low_part (match_operand:SWI12 0 "register_operand" "+<r>,<r>")) + [(set (strict_low_part (match_operand:SWI12 0 "register_operand" "+<r>,&<r>")) (and:SWI12 (match_operand:SWI12 1 "nonimmediate_operand" "%0,!<r>") (match_operand:SWI12 2 "general_operand" "<r>mn,<r>mn"))) (clobber (reg:CC FLAGS_REG))] @@ -10542,7 +10542,7 @@ ;; Alternative 1 is needed to work around LRA limitation, see PR82524. (define_insn_and_split "*<code><mode>_1_slp" - [(set (strict_low_part (match_operand:SWI12 0 "register_operand" "+<r>,<r>")) + [(set (strict_low_part (match_operand:SWI12 0 "register_operand" "+<r>,&<r>")) (any_or:SWI12 (match_operand:SWI12 1 "nonimmediate_operand" "%0,!<r>") (match_operand:SWI12 2 "general_operand" "<r>mn,<r>mn"))) (clobber (reg:CC FLAGS_REG))] @@ -10896,7 +10896,7 @@ ;; Alternative 1 is needed to work around LRA limitation, see PR82524. (define_insn_and_split "*neg<mode>_1_slp" - [(set (strict_low_part (match_operand:SWI12 0 "register_operand" "+<r>,<r>")) + [(set (strict_low_part (match_operand:SWI12 0 "register_operand" "+<r>,&<r>")) (neg:SWI12 (match_operand:SWI12 1 "register_operand" "0,!<r>"))) (clobber (reg:CC FLAGS_REG))] "!TARGET_PARTIAL_REG_STALL || optimize_function_for_size_p (cfun)" @@ -11489,7 +11489,7 @@ ;; Alternative 1 is needed to work around LRA limitation, see PR82524. (define_insn_and_split "*one_cmpl<mode>_1_slp" - [(set (strict_low_part (match_operand:SWI12 0 "register_operand" "+<r>,<r>")) + [(set (strict_low_part (match_operand:SWI12 0 "register_operand" "+<r>,&<r>")) (not:SWI12 (match_operand:SWI12 1 "register_operand" "0,!<r>")))] "!TARGET_PARTIAL_REG_STALL || optimize_function_for_size_p (cfun)" "@ @@ -12185,7 +12185,7 @@ ;; Alternative 1 is needed to work around LRA limitation, see PR82524. (define_insn_and_split "*ashl<mode>3_1_slp" - [(set (strict_low_part (match_operand:SWI12 0 "register_operand" "+<r>,<r>")) + [(set (strict_low_part (match_operand:SWI12 0 "register_operand" "+<r>,&<r>")) (ashift:SWI12 (match_operand:SWI12 1 "register_operand" "0,!<r>") (match_operand:QI 2 "nonmemory_operand" "cI,cI"))) (clobber (reg:CC FLAGS_REG))] @@ -13062,7 +13062,7 @@ ;; Alternative 1 is needed to work around LRA limitation, see PR82524. (define_insn_and_split "*<insn><mode>3_1_slp" - [(set (strict_low_part (match_operand:SWI12 0 "register_operand" "+<r>,<r>")) + [(set (strict_low_part (match_operand:SWI12 0 "register_operand" "+<r>,&<r>")) (any_shiftrt:SWI12 (match_operand:SWI12 1 "register_operand" "0,!<r>") (match_operand:QI 2 "nonmemory_operand" "cI,cI"))) (clobber (reg:CC FLAGS_REG))] @@ -13606,7 +13606,7 @@ ;; Alternative 1 is needed to work around LRA limitation, see PR82524. (define_insn_and_split "*<insn><mode>3_1_slp" - [(set (strict_low_part (match_operand:SWI12 0 "register_operand" "+<r>,<r>")) + [(set (strict_low_part (match_operand:SWI12 0 "register_operand" "+<r>,&<r>")) (any_rotate:SWI12 (match_operand:SWI12 1 "register_operand" "0,!<r>") (match_operand:QI 2 "nonmemory_operand" "cI,cI"))) (clobber (reg:CC FLAGS_REG))] |