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| author | David Edelsohn <edelsohn@gnu.org> | 2005-09-22 15:03:27 +0000 |
|---|---|---|
| committer | David Edelsohn <dje@gcc.gnu.org> | 2005-09-22 11:03:27 -0400 |
| commit | fb3249eff294078cff1605091efde8a9ae7922df (patch) | |
| tree | eb1fcbb8f825a6744655c838c8bc7c44ebdd40a7 /gcc | |
| parent | 6231646a02eebc2006f91c628ffca8f875ec9ac5 (diff) | |
| download | gcc-fb3249eff294078cff1605091efde8a9ae7922df.zip gcc-fb3249eff294078cff1605091efde8a9ae7922df.tar.gz gcc-fb3249eff294078cff1605091efde8a9ae7922df.tar.bz2 | |
re PR target/24007 (very weird register allocation, putting a fp in the ctr register)
PR target/24007
* config/rs6000/rs6000.md (movsf_hardfloat): Ignore special
registers when choosing register preferences.
(movdf_hardfloat): Same.
From-SVN: r104529
Diffstat (limited to 'gcc')
| -rw-r--r-- | gcc/ChangeLog | 7 | ||||
| -rw-r--r-- | gcc/config/rs6000/rs6000.md | 4 |
2 files changed, 9 insertions, 2 deletions
diff --git a/gcc/ChangeLog b/gcc/ChangeLog index f1a1d8e..efcba75 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,3 +1,10 @@ +2005-09-22 David Edelsohn <edelsohn@gnu.org> + + PR target/24007 + * config/rs6000/rs6000.md (movsf_hardfloat): Ignore special + registers when choosing register preferences. + (movdf_hardfloat): Same. + 2005-09-22 Andreas Krebbel <krebbel1@de.ibm.com> * expmed.c (expand_shift): Don't use the target of the rotate as diff --git a/gcc/config/rs6000/rs6000.md b/gcc/config/rs6000/rs6000.md index 8868f53..ef98384 100644 --- a/gcc/config/rs6000/rs6000.md +++ b/gcc/config/rs6000/rs6000.md @@ -7400,7 +7400,7 @@ }") (define_insn "*movsf_hardfloat" - [(set (match_operand:SF 0 "nonimmediate_operand" "=!r,!r,m,f,f,m,!cl,!q,!r,!h,!r,!r") + [(set (match_operand:SF 0 "nonimmediate_operand" "=!r,!r,m,f,f,m,*c*l,*q,!r,*h,!r,!r") (match_operand:SF 1 "input_operand" "r,m,r,f,m,f,r,r,h,0,G,Fn"))] "(gpc_reg_operand (operands[0], SFmode) || gpc_reg_operand (operands[1], SFmode)) @@ -7682,7 +7682,7 @@ ; ld/std require word-aligned displacements -> 'Y' constraint. ; List Y->r and r->Y before r->r for reload. (define_insn "*movdf_hardfloat64" - [(set (match_operand:DF 0 "nonimmediate_operand" "=Y,r,!r,f,f,m,!cl,!r,!h,!r,!r,!r") + [(set (match_operand:DF 0 "nonimmediate_operand" "=Y,r,!r,f,f,m,*c*l,!r,*h,!r,!r,!r") (match_operand:DF 1 "input_operand" "r,Y,r,f,m,f,r,h,0,G,H,F"))] "TARGET_POWERPC64 && TARGET_HARD_FLOAT && TARGET_FPRS && (gpc_reg_operand (operands[0], DFmode) |