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authorMatthew Wahab <matthew.wahab@arm.com>2015-08-18 16:10:10 +0000
committerMatthew Wahab <mwahab@gcc.gnu.org>2015-08-18 16:10:10 +0000
commitf6e93c21e78ccc4e0427ccd4c5cf4500e2dce3e3 (patch)
tree84fb3194495544e0eff8c0acb9ebe09d208cfcb2 /gcc
parent329524f5683acb537a2796f29a3a985dd8548bf7 (diff)
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atomic-comp-swap-release-acquire.c: Adjust dg-options to disable LSE extensions.
* gcc.target/aarch64/atomic-comp-swap-release-acquire.c: Adjust dg-options to disable LSE extensions. * gcc.target/aarch64/atomic-op-acq_rel.c: Likewise. * gcc.target/aarch64/atomic-op-acquire.c: Likewise. * gcc.target/aarch64/atomic-op-char.c: Likewise. * gcc.target/aarch64/atomic-op-consume.c: Likewise. * gcc.target/aarch64/atomic-op-imm.c: Likewise. * gcc.target/aarch64/atomic-op-int.c: Likewise. * gcc.target/aarch64/atomic-op-long.c: Likewise. * gcc.target/aarch64/atomic-op-relaxed.c: Likewise. * gcc.target/aarch64/atomic-op-seq_cst.c: Likewise. * gcc.target/aarch64/atomic-op-release.c: Likewise. * gcc.target/aarch64/atomic-op-short.c: Likewise. * gcc.target/aarch64/sync-comp-swap.c: Likewise. * gcc.target/aarch64/sync-op-acquire.c: Likewise. * gcc.target/aarch64/sync-op-full.c: Likewise. * gcc.target/aarch64/sync-op-release.c: Likewise. From-SVN: r226979
Diffstat (limited to 'gcc')
-rw-r--r--gcc/testsuite/ChangeLog20
-rw-r--r--gcc/testsuite/gcc.target/aarch64/atomic-comp-swap-release-acquire.c2
-rw-r--r--gcc/testsuite/gcc.target/aarch64/atomic-op-acq_rel.c2
-rw-r--r--gcc/testsuite/gcc.target/aarch64/atomic-op-acquire.c2
-rw-r--r--gcc/testsuite/gcc.target/aarch64/atomic-op-char.c2
-rw-r--r--gcc/testsuite/gcc.target/aarch64/atomic-op-consume.c2
-rw-r--r--gcc/testsuite/gcc.target/aarch64/atomic-op-imm.c2
-rw-r--r--gcc/testsuite/gcc.target/aarch64/atomic-op-int.c2
-rw-r--r--gcc/testsuite/gcc.target/aarch64/atomic-op-long.c2
-rw-r--r--gcc/testsuite/gcc.target/aarch64/atomic-op-relaxed.c2
-rw-r--r--gcc/testsuite/gcc.target/aarch64/atomic-op-release.c2
-rw-r--r--gcc/testsuite/gcc.target/aarch64/atomic-op-seq_cst.c2
-rw-r--r--gcc/testsuite/gcc.target/aarch64/atomic-op-short.c2
-rw-r--r--gcc/testsuite/gcc.target/aarch64/sync-comp-swap.c2
-rw-r--r--gcc/testsuite/gcc.target/aarch64/sync-op-acquire.c2
-rw-r--r--gcc/testsuite/gcc.target/aarch64/sync-op-full.c2
-rw-r--r--gcc/testsuite/gcc.target/aarch64/sync-op-release.c2
17 files changed, 36 insertions, 16 deletions
diff --git a/gcc/testsuite/ChangeLog b/gcc/testsuite/ChangeLog
index ede4dc4..7cb29d3 100644
--- a/gcc/testsuite/ChangeLog
+++ b/gcc/testsuite/ChangeLog
@@ -1,3 +1,23 @@
+2015-08-18 Matthew Wahab <matthew.wahab@arm.com>
+
+ * gcc.target/aarch64/atomic-comp-swap-release-acquire.c: Adjust
+ dg-options to disable LSE extensions.
+ * gcc.target/aarch64/atomic-op-acq_rel.c: Likewise.
+ * gcc.target/aarch64/atomic-op-acquire.c: Likewise.
+ * gcc.target/aarch64/atomic-op-char.c: Likewise.
+ * gcc.target/aarch64/atomic-op-consume.c: Likewise.
+ * gcc.target/aarch64/atomic-op-imm.c: Likewise.
+ * gcc.target/aarch64/atomic-op-int.c: Likewise.
+ * gcc.target/aarch64/atomic-op-long.c: Likewise.
+ * gcc.target/aarch64/atomic-op-relaxed.c: Likewise.
+ * gcc.target/aarch64/atomic-op-seq_cst.c: Likewise.
+ * gcc.target/aarch64/atomic-op-release.c: Likewise.
+ * gcc.target/aarch64/atomic-op-short.c: Likewise.
+ * gcc.target/aarch64/sync-comp-swap.c: Likewise.
+ * gcc.target/aarch64/sync-op-acquire.c: Likewise.
+ * gcc.target/aarch64/sync-op-full.c: Likewise.
+ * gcc.target/aarch64/sync-op-release.c: Likewise.
+
2015-08-18 Paolo Carlini <paolo.carlini@oracle.com>
PR c++/67160
diff --git a/gcc/testsuite/gcc.target/aarch64/atomic-comp-swap-release-acquire.c b/gcc/testsuite/gcc.target/aarch64/atomic-comp-swap-release-acquire.c
index b8f098d..49ca5d0 100644
--- a/gcc/testsuite/gcc.target/aarch64/atomic-comp-swap-release-acquire.c
+++ b/gcc/testsuite/gcc.target/aarch64/atomic-comp-swap-release-acquire.c
@@ -1,5 +1,5 @@
/* { dg-do compile } */
-/* { dg-options "-O2 -fno-ipa-icf" } */
+/* { dg-options "-march=armv8-a+nolse -O2 -fno-ipa-icf" } */
#include "atomic-comp-swap-release-acquire.x"
diff --git a/gcc/testsuite/gcc.target/aarch64/atomic-op-acq_rel.c b/gcc/testsuite/gcc.target/aarch64/atomic-op-acq_rel.c
index 8569ac0..74f2634 100644
--- a/gcc/testsuite/gcc.target/aarch64/atomic-op-acq_rel.c
+++ b/gcc/testsuite/gcc.target/aarch64/atomic-op-acq_rel.c
@@ -1,5 +1,5 @@
/* { dg-do compile } */
-/* { dg-options "-O2" } */
+/* { dg-options "-march=armv8-a+nolse -O2" } */
#include "atomic-op-acq_rel.x"
diff --git a/gcc/testsuite/gcc.target/aarch64/atomic-op-acquire.c b/gcc/testsuite/gcc.target/aarch64/atomic-op-acquire.c
index 57e6d57..66c1b1e 100644
--- a/gcc/testsuite/gcc.target/aarch64/atomic-op-acquire.c
+++ b/gcc/testsuite/gcc.target/aarch64/atomic-op-acquire.c
@@ -1,5 +1,5 @@
/* { dg-do compile } */
-/* { dg-options "-O2" } */
+/* { dg-options "-march=armv8-a+nolse -O2" } */
#include "atomic-op-acquire.x"
diff --git a/gcc/testsuite/gcc.target/aarch64/atomic-op-char.c b/gcc/testsuite/gcc.target/aarch64/atomic-op-char.c
index d6c2aa5..c09d043 100644
--- a/gcc/testsuite/gcc.target/aarch64/atomic-op-char.c
+++ b/gcc/testsuite/gcc.target/aarch64/atomic-op-char.c
@@ -1,5 +1,5 @@
/* { dg-do compile } */
-/* { dg-options "-O2" } */
+/* { dg-options "-march=armv8-a+nolse -O2" } */
#include "atomic-op-char.x"
diff --git a/gcc/testsuite/gcc.target/aarch64/atomic-op-consume.c b/gcc/testsuite/gcc.target/aarch64/atomic-op-consume.c
index 26ebbdf..5783ab8 100644
--- a/gcc/testsuite/gcc.target/aarch64/atomic-op-consume.c
+++ b/gcc/testsuite/gcc.target/aarch64/atomic-op-consume.c
@@ -1,5 +1,5 @@
/* { dg-do compile } */
-/* { dg-options "-O2" } */
+/* { dg-options "-march=armv8-a+nolse -O2" } */
#include "atomic-op-consume.x"
diff --git a/gcc/testsuite/gcc.target/aarch64/atomic-op-imm.c b/gcc/testsuite/gcc.target/aarch64/atomic-op-imm.c
index 47d7a96..18b8f0b 100644
--- a/gcc/testsuite/gcc.target/aarch64/atomic-op-imm.c
+++ b/gcc/testsuite/gcc.target/aarch64/atomic-op-imm.c
@@ -1,5 +1,5 @@
/* { dg-do compile } */
-/* { dg-options "-O2" } */
+/* { dg-options "-march=armv8-a+nolse -O2" } */
int v = 0;
diff --git a/gcc/testsuite/gcc.target/aarch64/atomic-op-int.c b/gcc/testsuite/gcc.target/aarch64/atomic-op-int.c
index 9ad7a79..8520f08 100644
--- a/gcc/testsuite/gcc.target/aarch64/atomic-op-int.c
+++ b/gcc/testsuite/gcc.target/aarch64/atomic-op-int.c
@@ -1,5 +1,5 @@
/* { dg-do compile } */
-/* { dg-options "-O2" } */
+/* { dg-options "-march=armv8-a+nolse -O2" } */
#include "atomic-op-int.x"
diff --git a/gcc/testsuite/gcc.target/aarch64/atomic-op-long.c b/gcc/testsuite/gcc.target/aarch64/atomic-op-long.c
index 0672d48..d011f8c 100644
--- a/gcc/testsuite/gcc.target/aarch64/atomic-op-long.c
+++ b/gcc/testsuite/gcc.target/aarch64/atomic-op-long.c
@@ -1,5 +1,5 @@
/* { dg-do compile } */
-/* { dg-options "-O2" } */
+/* { dg-options "-march=armv8-a+nolse -O2" } */
long v = 0;
diff --git a/gcc/testsuite/gcc.target/aarch64/atomic-op-relaxed.c b/gcc/testsuite/gcc.target/aarch64/atomic-op-relaxed.c
index cd3fe2c..ed96bfd 100644
--- a/gcc/testsuite/gcc.target/aarch64/atomic-op-relaxed.c
+++ b/gcc/testsuite/gcc.target/aarch64/atomic-op-relaxed.c
@@ -1,5 +1,5 @@
/* { dg-do compile } */
-/* { dg-options "-O2" } */
+/* { dg-options "-march=armv8-a+nolse -O2" } */
#include "atomic-op-relaxed.x"
diff --git a/gcc/testsuite/gcc.target/aarch64/atomic-op-release.c b/gcc/testsuite/gcc.target/aarch64/atomic-op-release.c
index 2fc04b2..fc4be17 100644
--- a/gcc/testsuite/gcc.target/aarch64/atomic-op-release.c
+++ b/gcc/testsuite/gcc.target/aarch64/atomic-op-release.c
@@ -1,5 +1,5 @@
/* { dg-do compile } */
-/* { dg-options "-O2" } */
+/* { dg-options "-march=armv8-a+nolse -O2" } */
#include "atomic-op-release.x"
diff --git a/gcc/testsuite/gcc.target/aarch64/atomic-op-seq_cst.c b/gcc/testsuite/gcc.target/aarch64/atomic-op-seq_cst.c
index 202d471..613000f 100644
--- a/gcc/testsuite/gcc.target/aarch64/atomic-op-seq_cst.c
+++ b/gcc/testsuite/gcc.target/aarch64/atomic-op-seq_cst.c
@@ -1,5 +1,5 @@
/* { dg-do compile } */
-/* { dg-options "-O2" } */
+/* { dg-options "-march=armv8-a+nolse -O2" } */
#include "atomic-op-seq_cst.x"
diff --git a/gcc/testsuite/gcc.target/aarch64/atomic-op-short.c b/gcc/testsuite/gcc.target/aarch64/atomic-op-short.c
index 39e71c1..e82c811 100644
--- a/gcc/testsuite/gcc.target/aarch64/atomic-op-short.c
+++ b/gcc/testsuite/gcc.target/aarch64/atomic-op-short.c
@@ -1,5 +1,5 @@
/* { dg-do compile } */
-/* { dg-options "-O2" } */
+/* { dg-options "-march=armv8-a+nolse -O2" } */
#include "atomic-op-short.x"
diff --git a/gcc/testsuite/gcc.target/aarch64/sync-comp-swap.c b/gcc/testsuite/gcc.target/aarch64/sync-comp-swap.c
index 126b997..e571b2f 100644
--- a/gcc/testsuite/gcc.target/aarch64/sync-comp-swap.c
+++ b/gcc/testsuite/gcc.target/aarch64/sync-comp-swap.c
@@ -1,5 +1,5 @@
/* { dg-do compile } */
-/* { dg-options "-O2 -fno-ipa-icf" } */
+/* { dg-options "-march=armv8-a+nolse -O2 -fno-ipa-icf" } */
#include "sync-comp-swap.x"
diff --git a/gcc/testsuite/gcc.target/aarch64/sync-op-acquire.c b/gcc/testsuite/gcc.target/aarch64/sync-op-acquire.c
index 2639f9f..357bf1b 100644
--- a/gcc/testsuite/gcc.target/aarch64/sync-op-acquire.c
+++ b/gcc/testsuite/gcc.target/aarch64/sync-op-acquire.c
@@ -1,5 +1,5 @@
/* { dg-do compile } */
-/* { dg-options "-O2" } */
+/* { dg-options "-march=armv8-a+nolse -O2" } */
#include "sync-op-acquire.x"
diff --git a/gcc/testsuite/gcc.target/aarch64/sync-op-full.c b/gcc/testsuite/gcc.target/aarch64/sync-op-full.c
index 10fc8fc..c6ba162 100644
--- a/gcc/testsuite/gcc.target/aarch64/sync-op-full.c
+++ b/gcc/testsuite/gcc.target/aarch64/sync-op-full.c
@@ -1,5 +1,5 @@
/* { dg-do compile } */
-/* { dg-options "-O2" } */
+/* { dg-options "-march=armv8-a+nolse -O2" } */
#include "sync-op-full.x"
diff --git a/gcc/testsuite/gcc.target/aarch64/sync-op-release.c b/gcc/testsuite/gcc.target/aarch64/sync-op-release.c
index d25b46f..7e3d7ac 100644
--- a/gcc/testsuite/gcc.target/aarch64/sync-op-release.c
+++ b/gcc/testsuite/gcc.target/aarch64/sync-op-release.c
@@ -1,5 +1,5 @@
/* { dg-do compile } */
-/* { dg-options "-O2" } */
+/* { dg-options "-march=armv8-a+nolse -O2" } */
#include "sync-op-release.x"