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| author | Uros Bizjak <ubizjak@gmail.com> | 2019-08-02 17:46:02 +0200 |
|---|---|---|
| committer | Uros Bizjak <uros@gcc.gnu.org> | 2019-08-02 17:46:02 +0200 |
| commit | f04bffb04a4dae3e1a1f87f53c4591fc48bb8058 (patch) | |
| tree | ed6e12926b05644e4d6207c30b3ba18fd12b8d2f /gcc | |
| parent | 06b4c6d2732c76d8660af53d52c0092505e87ea7 (diff) | |
| download | gcc-f04bffb04a4dae3e1a1f87f53c4591fc48bb8058.zip gcc-f04bffb04a4dae3e1a1f87f53c4591fc48bb8058.tar.gz gcc-f04bffb04a4dae3e1a1f87f53c4591fc48bb8058.tar.bz2 | |
re PR tree-optimization/91201 (SIMD not generated for horizontal sum of bytes in array)
PR target/91201
* config/i386/sse.md (*vec_extractv16qi_zext): New insn pattern.
testsuite/ChangeLog:
PR target/91201
* gcc.target/i386/sse4_1-pr91201.c: New test.
From-SVN: r274018
Diffstat (limited to 'gcc')
| -rw-r--r-- | gcc/ChangeLog | 5 | ||||
| -rw-r--r-- | gcc/config/i386/sse.md | 19 | ||||
| -rw-r--r-- | gcc/testsuite/ChangeLog | 5 | ||||
| -rw-r--r-- | gcc/testsuite/gcc.target/i386/sse4_1-pr91201.c | 12 |
4 files changed, 41 insertions, 0 deletions
diff --git a/gcc/ChangeLog b/gcc/ChangeLog index 6c1372e..e63e09d 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,3 +1,8 @@ +2019-08-02 Uroš Bizjak <ubizjak@gmail.com> + + PR target/91201 + * config/i386/sse.md (*vec_extractv16qi_zext): New insn pattern. + 2019-08-02 Alexander Monakov <amonakov@ispras.ru> * tree-ssa-loop-im.c (sort_bbs_in_loop_postorder_cmp): Simplify casts diff --git a/gcc/config/i386/sse.md b/gcc/config/i386/sse.md index 56a8915..3391724 100644 --- a/gcc/config/i386/sse.md +++ b/gcc/config/i386/sse.md @@ -14970,6 +14970,25 @@ (set_attr "prefix" "maybe_vex") (set_attr "mode" "TI")]) +(define_insn "*vec_extractv16qi_zext" + [(set (match_operand:HI 0 "register_operand" "=r,r") + (zero_extend:HI + (vec_select:QI + (match_operand:V16QI 1 "register_operand" "x,v") + (parallel + [(match_operand:SI 2 "const_0_to_15_operand")]))))] + "TARGET_SSE4_1" + "@ + %vpextrb\t{%2, %1, %k0|%k0, %1, %2} + vpextrb\t{%2, %1, %k0|%k0, %1, %2}" + [(set_attr "isa" "*,avx512bw") + (set_attr "type" "sselog1") + (set_attr "prefix_data16" "1") + (set_attr "prefix_extra" "1") + (set_attr "length_immediate" "1") + (set_attr "prefix" "maybe_vex") + (set_attr "mode" "TI")]) + (define_insn "*vec_extract<mode>_mem" [(set (match_operand:<ssescalarmode> 0 "register_operand" "=r") (vec_select:<ssescalarmode> diff --git a/gcc/testsuite/ChangeLog b/gcc/testsuite/ChangeLog index 00d664f..45d941d 100644 --- a/gcc/testsuite/ChangeLog +++ b/gcc/testsuite/ChangeLog @@ -1,3 +1,8 @@ +2019-08-02 Uroš Bizjak <ubizjak@gmail.com> + + PR target/91201 + * gcc.target/i386/sse4_1-pr91201.c: New test. + 2019-08-02 Marek Polacek <polacek@redhat.com> PR c++/91230 - wrong error with __PRETTY_FUNCTION__ and generic lambda. diff --git a/gcc/testsuite/gcc.target/i386/sse4_1-pr91201.c b/gcc/testsuite/gcc.target/i386/sse4_1-pr91201.c new file mode 100644 index 0000000..095d18e --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/sse4_1-pr91201.c @@ -0,0 +1,12 @@ +/* PR tree-optimization/91201 */ +/* { dg-do compile } */ +/* { dg-options "-Os -msse4.1 -masm=att" } */ +/* { dg-final { scan-assembler-not "\tmovzb(w|l)" } } */ + +typedef unsigned char V __attribute__((vector_size (16))); + +unsigned short +foo (V x) +{ + return x[0]; +} |