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| author | Chung-Ju Wu <jasonwucj@gmail.com> | 2018-04-25 12:17:29 +0000 |
|---|---|---|
| committer | Chung-Ju Wu <jasonwucj@gcc.gnu.org> | 2018-04-25 12:17:29 +0000 |
| commit | ed4230b2f9bfe98205b155df607bf6c608b1b78d (patch) | |
| tree | a83b48458d6c745652c243ba0e6f93e77786f8de /gcc | |
| parent | ba169b74244d4c485f53841733dd82e7e48dc9bd (diff) | |
| download | gcc-ed4230b2f9bfe98205b155df607bf6c608b1b78d.zip gcc-ed4230b2f9bfe98205b155df607bf6c608b1b78d.tar.gz gcc-ed4230b2f9bfe98205b155df607bf6c608b1b78d.tar.bz2 | |
[NDS32] Split movdi/df if reigster number is illegal.
gcc/
* config/nds32/nds32-doubleword.md: New define_split pattern for
illegal register number.
From-SVN: r259646
Diffstat (limited to 'gcc')
| -rw-r--r-- | gcc/ChangeLog | 5 | ||||
| -rw-r--r-- | gcc/config/nds32/nds32-doubleword.md | 18 |
2 files changed, 23 insertions, 0 deletions
diff --git a/gcc/ChangeLog b/gcc/ChangeLog index 3c7e29d..a0adc88 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,5 +1,10 @@ 2018-04-25 Chung-Ju Wu <jasonwucj@gmail.com> + * config/nds32/nds32-doubleword.md: New define_split pattern for + illegal register number. + +2018-04-25 Chung-Ju Wu <jasonwucj@gmail.com> + * config/nds32/nds32.c (nds32_print_operand): Set op_value ealier. 2018-04-25 Chung-Ju Wu <jasonwucj@gmail.com> diff --git a/gcc/config/nds32/nds32-doubleword.md b/gcc/config/nds32/nds32-doubleword.md index 7df715a..4505337 100644 --- a/gcc/config/nds32/nds32-doubleword.md +++ b/gcc/config/nds32/nds32-doubleword.md @@ -118,6 +118,24 @@ ]) (set_attr "feature" " v1, v1, v1, v1, v1, v1, fpu, fpu, fpu, fpu, fpu")]) +;; Split move_di pattern when the hard register is odd. +(define_split + [(set (match_operand:DIDF 0 "register_operand" "") + (match_operand:DIDF 1 "register_operand" ""))] + "(NDS32_IS_GPR_REGNUM (REGNO (operands[0])) + && ((REGNO (operands[0]) & 0x1) == 1)) + || (NDS32_IS_GPR_REGNUM (REGNO (operands[1])) + && ((REGNO (operands[1]) & 0x1) == 1))" + [(set (match_dup 2) (match_dup 3)) + (set (match_dup 4) (match_dup 5))] + { + operands[2] = gen_lowpart (SImode, operands[0]); + operands[4] = gen_highpart (SImode, operands[0]); + operands[3] = gen_lowpart (SImode, operands[1]); + operands[5] = gen_highpart (SImode, operands[1]); + } +) + (define_split [(set (match_operand:DIDF 0 "register_operand" "") (match_operand:DIDF 1 "const_double_operand" ""))] |