aboutsummaryrefslogtreecommitdiff
path: root/gcc
diff options
context:
space:
mode:
authorRichard Henderson <rth@redhat.com>2005-06-19 09:36:46 -0700
committerRichard Henderson <rth@gcc.gnu.org>2005-06-19 09:36:46 -0700
commite364ab3ab7e21141218956a59dba88f04c34f8b9 (patch)
tree651f782f7de5fa4506653b63152ac492e7f654dd /gcc
parentb4e3537b6085529b6ca85e9a11106984857d61a9 (diff)
downloadgcc-e364ab3ab7e21141218956a59dba88f04c34f8b9.zip
gcc-e364ab3ab7e21141218956a59dba88f04c34f8b9.tar.gz
gcc-e364ab3ab7e21141218956a59dba88f04c34f8b9.tar.bz2
vect.md (vec_extractv2sf_1): Fix cut-and-paste error; the shift is always required.
* config/ia64/vect.md (vec_extractv2sf_1): Fix cut-and-paste error; the shift is always required. From-SVN: r101186
Diffstat (limited to 'gcc')
-rw-r--r--gcc/ChangeLog5
-rw-r--r--gcc/config/ia64/vect.md16
2 files changed, 9 insertions, 12 deletions
diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index 460489b..678b0c5 100644
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,5 +1,10 @@
2005-06-19 Richard Henderson <rth@redhat.com>
+ * config/ia64/vect.md (vec_extractv2sf_1): Fix cut-and-paste error;
+ the shift is always required.
+
+2005-06-19 Richard Henderson <rth@redhat.com>
+
* config/ia64/ia64-modes.def (V4SF): Add.
* config/ia64/ia64.c (ia64_legitimate_constant_p): Handle CONST_VECTOR.
* config/ia64/ia64.h (CANNOT_CHANGE_MODE_CLASS): Allow vector to
diff --git a/gcc/config/ia64/vect.md b/gcc/config/ia64/vect.md
index c9dcf08..c2f8a1a 100644
--- a/gcc/config/ia64/vect.md
+++ b/gcc/config/ia64/vect.md
@@ -1070,7 +1070,7 @@
})
(define_insn_and_split "*vec_extractv2sf_1"
- [(set (match_operand:SF 0 "register_operand" "=rf")
+ [(set (match_operand:SF 0 "register_operand" "=r")
(unspec:SF [(match_operand:V2SF 1 "register_operand" "r")
(const_int 1)]
UNSPEC_VECT_EXTR))]
@@ -1079,17 +1079,9 @@
"reload_completed"
[(const_int 0)]
{
- if (FR_REGNO_P (REGNO (operands[0])))
- {
- operands[1] = gen_rtx_REG (SFmode, REGNO (operands[1]));
- emit_move_insn (operands[0], operands[1]);
- }
- else
- {
- operands[0] = gen_rtx_REG (DImode, REGNO (operands[0]));
- operands[1] = gen_rtx_REG (DImode, REGNO (operands[1]));
- emit_insn (gen_lshrdi3 (operands[0], operands[1], GEN_INT (32)));
- }
+ operands[0] = gen_rtx_REG (DImode, REGNO (operands[0]));
+ operands[1] = gen_rtx_REG (DImode, REGNO (operands[1]));
+ emit_insn (gen_lshrdi3 (operands[0], operands[1], GEN_INT (32)));
DONE;
})