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authorRichard Henderson <rth@redhat.com>2002-02-26 14:41:48 -0800
committerRichard Henderson <rth@gcc.gnu.org>2002-02-26 14:41:48 -0800
commite013f3c710053365bf37129b6eaf13a3b63e3211 (patch)
treee08c1ab77a966deca60c7178b7001352a4b71f56 /gcc
parent9e944a165da7e84b70f4b136a7e9992f4638c8ad (diff)
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ia64.c (nop_cycles_until): Do init_insn_group_barriers if we emitted a stop bit.
* config/ia64/ia64.c (nop_cycles_until): Do init_insn_group_barriers if we emitted a stop bit. From-SVN: r50065
Diffstat (limited to 'gcc')
-rw-r--r--gcc/ChangeLog5
-rw-r--r--gcc/config/ia64/ia64.c7
2 files changed, 12 insertions, 0 deletions
diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index 30d2700..6bf8b86 100644
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,3 +1,8 @@
+2002-02-26 Richard Henderson <rth@redhat.com>
+
+ * config/ia64/ia64.c (nop_cycles_until): Do init_insn_group_barriers
+ if we emitted a stop bit.
+
2002-02-26 Jakub Jelinek <jakub@redhat.com>
* configure.in (libgcc_visibility): Substitute.
diff --git a/gcc/config/ia64/ia64.c b/gcc/config/ia64/ia64.c
index 2bdc16c..8e975e0 100644
--- a/gcc/config/ia64/ia64.c
+++ b/gcc/config/ia64/ia64.c
@@ -6090,12 +6090,14 @@ nop_cycles_until (clock_var, dump)
{
int prev_clock = prev_cycle;
int cycles_left = clock_var - prev_clock;
+ bool did_stop = false;
/* Finish the previous cycle; pad it out with NOPs. */
if (sched_data.cur == 3)
{
rtx t = gen_insn_group_barrier (GEN_INT (3));
last_issued = emit_insn_after (t, last_issued);
+ did_stop = true;
maybe_rotate (dump);
}
else if (sched_data.cur > 0)
@@ -6148,6 +6150,7 @@ nop_cycles_until (clock_var, dump)
{
rtx t = gen_insn_group_barrier (GEN_INT (3));
last_issued = emit_insn_after (t, last_issued);
+ did_stop = true;
}
maybe_rotate (dump);
}
@@ -6171,8 +6174,12 @@ nop_cycles_until (clock_var, dump)
last_issued = emit_insn_after (t, last_issued);
t = gen_insn_group_barrier (GEN_INT (3));
last_issued = emit_insn_after (t, last_issued);
+ did_stop = true;
cycles_left--;
}
+
+ if (did_stop)
+ init_insn_group_barriers ();
}
/* We are about to being issuing insns for this clock cycle.