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| author | Janis Johnson <janis187@us.ibm.com> | 2005-02-01 21:33:28 +0000 |
|---|---|---|
| committer | Janis Johnson <janis@gcc.gnu.org> | 2005-02-01 21:33:28 +0000 |
| commit | dc5944f7c8dcd3f5dab3574422dec6344dddc57c (patch) | |
| tree | f352e772150e4ba3bcbd23b01400b62ff93171dd /gcc | |
| parent | dd1d184d74508646d4b6b2fb33de72c18807b97e (diff) | |
| download | gcc-dc5944f7c8dcd3f5dab3574422dec6344dddc57c.zip gcc-dc5944f7c8dcd3f5dab3574422dec6344dddc57c.tar.gz gcc-dc5944f7c8dcd3f5dab3574422dec6344dddc57c.tar.bz2 | |
simd-2.C: Check for AltiVec HW support at runtime.
* g++.dg/eh/simd-2.C: Check for AltiVec HW support at runtime.
* g++.dg/eh/check-vect.h: New.
From-SVN: r94565
Diffstat (limited to 'gcc')
| -rw-r--r-- | gcc/testsuite/ChangeLog | 3 | ||||
| -rw-r--r-- | gcc/testsuite/g++.dg/eh/check-vect.h | 26 | ||||
| -rw-r--r-- | gcc/testsuite/g++.dg/eh/simd-2.C | 12 |
3 files changed, 35 insertions, 6 deletions
diff --git a/gcc/testsuite/ChangeLog b/gcc/testsuite/ChangeLog index af57ef3..537f38a 100644 --- a/gcc/testsuite/ChangeLog +++ b/gcc/testsuite/ChangeLog @@ -1,5 +1,8 @@ 2005-02-01 Janis Johnson <janis187@us.ibm.com> + * g++.dg/eh/simd-2.C: Check for AltiVec HW support at runtime. + * g++.dg/eh/check-vect.h: New. + * gcc.dg/vect/vect-77.c: Replace xfail selector with expression. * gcc.dg/vect/vect-78.c: Ditto. * gcc.dg/vect/vect.exp (check_effective_target_lp64_or_vect_no_align): diff --git a/gcc/testsuite/g++.dg/eh/check-vect.h b/gcc/testsuite/g++.dg/eh/check-vect.h new file mode 100644 index 0000000..4321be0 --- /dev/null +++ b/gcc/testsuite/g++.dg/eh/check-vect.h @@ -0,0 +1,26 @@ +/* Check if system supports SIMD. Copied from gcc.dg/vect/tree-vect.h. */ +#include <signal.h> + +extern "C" void abort (void); +extern "C" void exit (int); + +void +sig_ill_handler (int sig) +{ + exit(0); +} + +void check_vect (void) +{ + signal(SIGILL, sig_ill_handler); +#if defined(__ppc__) || defined(__ppc64__) || defined(__powerpc__) || defined(powerpc) + /* Altivec instruction, 'vor %v0,%v0,%v0'. */ + asm volatile (".long 0x10000484"); +#elif defined(__i386__) || defined(__x86_64__) + /* SSE2 instruction: movsd %xmm0,%xmm0 */ + asm volatile (".byte 0xf2,0x0f,0x10,0xc0"); +#elif defined(__sparc__) + asm volatile (".word\t0x81b007c0"); +#endif + signal (SIGILL, SIG_DFL); +} diff --git a/gcc/testsuite/g++.dg/eh/simd-2.C b/gcc/testsuite/g++.dg/eh/simd-2.C index 5b37f3e..9d9dce5 100644 --- a/gcc/testsuite/g++.dg/eh/simd-2.C +++ b/gcc/testsuite/g++.dg/eh/simd-2.C @@ -2,8 +2,10 @@ // Contributed by Aldy Hernandez (aldy@quesejoda.com). // { dg-options "-O" } // { dg-options "-O -w" { target i?86-*-* } } -// { dg-options "-O -w -maltivec" { target powerpc64-*-linux* } } -// { dg-do run { xfail "powerpc64-*-linux*"} } +// { dg-options "-O -w -maltivec" { target powerpc*-*-linux* } } +// { dg-do run } + +#include "check-vect.h" typedef int __attribute__((vector_size (16))) vecint; @@ -43,10 +45,8 @@ void f1 (void) int main () { -#if defined(__powerpc64__) && defined(__linux__) - // Don't run on ppc64-linux, since not always AltiVec regs available - return -1; -#endif + /* Exit with zero if the hardware does not support AltiVec instructions. */ + check_vect (); f1 (); return 0; } |