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author | Tamar Christina <tamar.christina@arm.com> | 2021-06-03 10:26:02 +0100 |
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committer | Tamar Christina <tamar.christina@arm.com> | 2021-06-03 10:26:02 +0100 |
commit | d9a83b99349071e1c6e78df7fea3424338390d5e (patch) | |
tree | 5bd33474542235091d02ff0db128a9d257331907 /gcc | |
parent | 098f4e989beb1a1be1157430c56ea4f158c1d538 (diff) | |
download | gcc-d9a83b99349071e1c6e78df7fea3424338390d5e.zip gcc-d9a83b99349071e1c6e78df7fea3424338390d5e.tar.gz gcc-d9a83b99349071e1c6e78df7fea3424338390d5e.tar.bz2 |
AArch64: Fix failing testcase for native cpu detection
A late change in the patch changed the implemented ID to one that
hasn't been used yet to avoid any ambiguity. Unfortunately the
chosen value of 0xFF matches the value of -1 which is used as an
invalid implementer so the test started failing.
This patch changes it to 0xFE which is the highest usable number.
gcc/testsuite/ChangeLog:
* gcc.target/aarch64/cpunative/info_16: Update implementer.
* gcc.target/aarch64/cpunative/info_17: Likewise
Diffstat (limited to 'gcc')
-rw-r--r-- | gcc/testsuite/gcc.target/aarch64/cpunative/info_16 | 2 | ||||
-rw-r--r-- | gcc/testsuite/gcc.target/aarch64/cpunative/info_17 | 2 |
2 files changed, 2 insertions, 2 deletions
diff --git a/gcc/testsuite/gcc.target/aarch64/cpunative/info_16 b/gcc/testsuite/gcc.target/aarch64/cpunative/info_16 index b067957..2c04ff1 100644 --- a/gcc/testsuite/gcc.target/aarch64/cpunative/info_16 +++ b/gcc/testsuite/gcc.target/aarch64/cpunative/info_16 @@ -1,7 +1,7 @@ processor : 0 BogoMIPS : 100.00 Features : fp asimd evtstrm aes pmull sha1 sha2 crc32 asimddp sve sve2 -CPU implementer : 0xff +CPU implementer : 0xfe CPU architecture: 8 CPU variant : 0x0 CPU part : 0xd08 diff --git a/gcc/testsuite/gcc.target/aarch64/cpunative/info_17 b/gcc/testsuite/gcc.target/aarch64/cpunative/info_17 index b067957..2c04ff1 100644 --- a/gcc/testsuite/gcc.target/aarch64/cpunative/info_17 +++ b/gcc/testsuite/gcc.target/aarch64/cpunative/info_17 @@ -1,7 +1,7 @@ processor : 0 BogoMIPS : 100.00 Features : fp asimd evtstrm aes pmull sha1 sha2 crc32 asimddp sve sve2 -CPU implementer : 0xff +CPU implementer : 0xfe CPU architecture: 8 CPU variant : 0x0 CPU part : 0xd08 |