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author | Senthil Kumar Selvaraj <senthilkumar.selvaraj@microchip.com> | 2018-12-17 10:50:54 +0000 |
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committer | Senthil Kumar Selvaraj <saaadhu@gcc.gnu.org> | 2018-12-17 10:50:54 +0000 |
commit | d7c00826362598d636ef1eb92a1b194d46b41473 (patch) | |
tree | 8259daac4937112ea61012e745a20a8d4140b029 /gcc | |
parent | 13e08dc93941675cd6a7cf5470b437c4f640c996 (diff) | |
download | gcc-d7c00826362598d636ef1eb92a1b194d46b41473.zip gcc-d7c00826362598d636ef1eb92a1b194d46b41473.tar.gz gcc-d7c00826362598d636ef1eb92a1b194d46b41473.tar.bz2 |
re PR rtl-optimization/88253 (Inlining of function incorrectly deletes volatile register access when using XOR in avr-gcc)
Fix PR 88253
gcc/ChangeLog:
PR rtl-optimization/88253
* combine.c (combine_simplify_rtx): Test for side-effects before
substituting by zero.
gcc/testsuite/ChangeLog:
PR rtl-optimization/88253
* gcc.target/avr/pr88253.c: New test.
From-SVN: r267198
Diffstat (limited to 'gcc')
-rw-r--r-- | gcc/ChangeLog | 6 | ||||
-rw-r--r-- | gcc/combine.c | 5 | ||||
-rw-r--r-- | gcc/testsuite/ChangeLog | 5 | ||||
-rw-r--r-- | gcc/testsuite/gcc.target/avr/pr88253.c | 16 |
4 files changed, 30 insertions, 2 deletions
diff --git a/gcc/ChangeLog b/gcc/ChangeLog index 83900c5..e63c4c9 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,3 +1,9 @@ +2018-12-17 Senthil Kumar Selvaraj <senthilkumar.selvaraj@microchip.com> + + PR rtl-optimization/88253 + * combine.c (combine_simplify_rtx): Test for side-effects before + substituting by zero. + 2018-12-17 Richard Sandiford <richard.sandiford@arm.com> * doc/invoke.texi (-fversion-loops-for-strides): Document diff --git a/gcc/combine.c b/gcc/combine.c index 7e61139..220c3a4 100644 --- a/gcc/combine.c +++ b/gcc/combine.c @@ -5978,8 +5978,9 @@ combine_simplify_rtx (rtx x, machine_mode op0_mode, int in_dest, && known_eq (subreg_lowpart_offset (int_mode, int_op0_mode), SUBREG_BYTE (x)) && HWI_COMPUTABLE_MODE_P (int_op0_mode) - && (nonzero_bits (SUBREG_REG (x), int_op0_mode) - & GET_MODE_MASK (int_mode)) == 0) + && ((nonzero_bits (SUBREG_REG (x), int_op0_mode) + & GET_MODE_MASK (int_mode)) == 0) + && !side_effects_p (SUBREG_REG (x))) return CONST0_RTX (int_mode); } diff --git a/gcc/testsuite/ChangeLog b/gcc/testsuite/ChangeLog index 6fc2f0c..8ba858b 100644 --- a/gcc/testsuite/ChangeLog +++ b/gcc/testsuite/ChangeLog @@ -1,3 +1,8 @@ +2018-12-17 Senthil Kumar Selvaraj <senthilkumar.selvaraj@microchip.com> + + PR rtl-optimization/88253 + * gcc.target/avr/pr88253.c: New test. + 2018-12-17 Richard Sandiford <richard.sandiford@arm.com> * gcc.dg/loop-versioning-1.c: New test. diff --git a/gcc/testsuite/gcc.target/avr/pr88253.c b/gcc/testsuite/gcc.target/avr/pr88253.c new file mode 100644 index 0000000..7fa7e4e --- /dev/null +++ b/gcc/testsuite/gcc.target/avr/pr88253.c @@ -0,0 +1,16 @@ +/* { dg-do compile } */ +/* { dg-options "-Os -w" } */ + +static int aRead() __attribute__((always_inline)); +static int aRead() { + unsigned char h,l; + l = (*(volatile unsigned char *)(0x78)) ; + h = (*(volatile unsigned char *)(0x79)) ; + return (h<<8) | l; +} + +int main() { + volatile unsigned char x; + x = aRead()^42; + } + /* { dg-final { scan-assembler "lds r\\d+,121" } } */ |