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| author | Richard Henderson <rth@redhat.com> | 2002-02-26 17:52:18 -0800 |
|---|---|---|
| committer | Richard Henderson <rth@gcc.gnu.org> | 2002-02-26 17:52:18 -0800 |
| commit | d699058e0acb8582badd4444fed31ed9126c745a (patch) | |
| tree | e89eca2978666490e01d2b9e38b9dc7d08a1fe02 /gcc | |
| parent | eadccfbb857dfdac6c286b38bc500154785c5982 (diff) | |
| download | gcc-d699058e0acb8582badd4444fed31ed9126c745a.zip gcc-d699058e0acb8582badd4444fed31ed9126c745a.tar.gz gcc-d699058e0acb8582badd4444fed31ed9126c745a.tar.bz2 | |
* config/alpha/alpha.md (ashldi_se): Re-enable.
From-SVN: r50083
Diffstat (limited to 'gcc')
| -rw-r--r-- | gcc/ChangeLog | 4 | ||||
| -rw-r--r-- | gcc/config/alpha/alpha.md | 31 |
2 files changed, 18 insertions, 17 deletions
diff --git a/gcc/ChangeLog b/gcc/ChangeLog index dedadf2..84085d3 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,5 +1,9 @@ 2002-02-26 Richard Henderson <rth@redhat.com> + * config/alpha/alpha.md (ashldi_se): Re-enable. + +2002-02-26 Richard Henderson <rth@redhat.com> + * config/alpha/alpha.c (alpha_encode_section_info): Examine MODULE_LOCAL_P; improve commentary. diff --git a/gcc/config/alpha/alpha.md b/gcc/config/alpha/alpha.md index fbbac9e..fdbdf08 100644 --- a/gcc/config/alpha/alpha.md +++ b/gcc/config/alpha/alpha.md @@ -1597,23 +1597,20 @@ fadd,fmul,fcpys,fdiv,fsqrt,misc,mvi,ftoi,itof,multi" } [(set_attr "type" "iadd,shift")]) -;; ??? The following pattern is made by combine, but earlier phases -;; (specifically flow) can't handle it. This occurs in jump.c. Deal -;; with this in a better way at some point. -;;(define_insn "" -;; [(set (match_operand:DI 0 "register_operand" "=r") -;; (sign_extend:DI -;; (subreg:SI (ashift:DI (match_operand:DI 1 "reg_or_0_operand" "rJ") -;; (match_operand:DI 2 "const_int_operand" "P")) -;; 0)))] -;; "INTVAL (operands[2]) >= 1 && INTVAL (operands[2]) <= 3" -;;{ -;; if (operands[2] == const1_rtx) -;; return "addl %r1,%r1,%0"; -;; else -;; return "s%P2addl %r1,0,%0"; -;;} -;; [(set_attr "type" "iadd")]) +(define_insn "*ashldi_se" + [(set (match_operand:DI 0 "register_operand" "=r") + (sign_extend:DI + (subreg:SI (ashift:DI (match_operand:DI 1 "reg_or_0_operand" "rJ") + (match_operand:DI 2 "const_int_operand" "P")) + 0)))] + "INTVAL (operands[2]) >= 1 && INTVAL (operands[2]) <= 3" +{ + if (operands[2] == const1_rtx) + return "addl %r1,%r1,%0"; + else + return "s%P2addl %r1,0,%0"; +} + [(set_attr "type" "iadd")]) (define_insn "lshrdi3" [(set (match_operand:DI 0 "register_operand" "=r") |