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| author | Nagaraju Mekala <nagaraju.mekala@xilinx.com> | 2014-02-11 01:52:54 +0000 |
|---|---|---|
| committer | Michael Eager <eager@gcc.gnu.org> | 2014-02-11 01:52:54 +0000 |
| commit | d63f13116fae7379c1645582bdc6c2e7c02cd56c (patch) | |
| tree | 9dfd830478595ed1f0fe14d8b5a5cba0f71ef375 /gcc | |
| parent | ed8b71cc56709133186faad24a65c4926de73bcc (diff) | |
| download | gcc-d63f13116fae7379c1645582bdc6c2e7c02cd56c.zip gcc-d63f13116fae7379c1645582bdc6c2e7c02cd56c.tar.gz gcc-d63f13116fae7379c1645582bdc6c2e7c02cd56c.tar.bz2 | |
Added the lwr/swr instructions pattern.
lwr and swr instructions will load/store the data with opposite endianness.
Changelog
2014-02-10 Nagaraju Mekala <nagaraju.mekala@xilinx.com>
* gcc/config/microblaze/microblaze.md: Add movsi4_rev insn pattern.
* gcc/config/microblaze/predicates.md: Add reg_or_mem_operand predicate.
From-SVN: r207683
Diffstat (limited to 'gcc')
| -rw-r--r-- | gcc/ChangeLog | 7 | ||||
| -rw-r--r-- | gcc/config/microblaze/microblaze.md | 12 | ||||
| -rw-r--r-- | gcc/config/microblaze/predicates.md | 4 |
3 files changed, 22 insertions, 1 deletions
diff --git a/gcc/ChangeLog b/gcc/ChangeLog index 8198a5f..1a61595 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,4 +1,9 @@ -2013-11-26 Nagaraju Mekala <nagaraju.mekala@xilinx.com> +2014-02-10 Nagaraju Mekala <nagaraju.mekala@xilinx.com> + + * config/microblaze/microblaze.md: Add movsi4_rev insn pattern. + * config/microblaze/predicates.md: Add reg_or_mem_operand predicate. + +2014-02-10 Nagaraju Mekala <nagaraju.mekala@xilinx.com> * config/microblaze/microblaze.c: Extend mcpu version format diff --git a/gcc/config/microblaze/microblaze.md b/gcc/config/microblaze/microblaze.md index 8431f2d..01c49e0 100644 --- a/gcc/config/microblaze/microblaze.md +++ b/gcc/config/microblaze/microblaze.md @@ -1119,6 +1119,18 @@ } ) +;;Load and store reverse +(define_insn "movsi4_rev" + [(set (match_operand:SI 0 "reg_or_mem_operand" "=r,Q") + (bswap:SI (match_operand:SF 1 "reg_or_mem_operand" "Q,r")))] + "TARGET_REORDER" + "@ + lwr\t%0,%y1,r0 + swr\t%1,%y0,r0" + [(set_attr "type" "load,store") + (set_attr "mode" "SI") + (set_attr "length" "4,4")]) + ;; 32-bit floating point moves (define_expand "movsf" diff --git a/gcc/config/microblaze/predicates.md b/gcc/config/microblaze/predicates.md index 83e8e79..f34453c 100644 --- a/gcc/config/microblaze/predicates.md +++ b/gcc/config/microblaze/predicates.md @@ -85,6 +85,10 @@ (ior (match_operand 0 "const_0_operand") (match_operand 0 "register_operand"))) +(define_predicate "reg_or_mem_operand" + (ior (match_operand 0 "memory_operand") + (match_operand 0 "register_operand"))) + ;; Return if the operand is either the PC or a label_ref. (define_special_predicate "pc_or_label_operand" (ior (match_code "pc,label_ref") |