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author | J"orn Rennecke <amylaar@cygnus.co.uk> | 1998-04-23 13:37:16 +0000 |
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committer | Joern Rennecke <amylaar@gcc.gnu.org> | 1998-04-23 14:37:16 +0100 |
commit | d0c4285986ccce7996149b5dfca7f0b968f6ff46 (patch) | |
tree | c7477b9c40c3c53934a0ea2b458d6c3ea1dcf454 /gcc | |
parent | 6df38d6ddc7aa57eb359f1d6fdc102f8905920ad (diff) | |
download | gcc-d0c4285986ccce7996149b5dfca7f0b968f6ff46.zip gcc-d0c4285986ccce7996149b5dfca7f0b968f6ff46.tar.gz gcc-d0c4285986ccce7996149b5dfca7f0b968f6ff46.tar.bz2 |
sh.c (gen_ashift_hi): Implement right shifts via gen_ashift.
* sh.c (gen_ashift_hi): Implement right shifts via gen_ashift.
* sh.md (ashrhi3_k, lshrhi3_k, lshrhi3_m, lshrhi3, lshrhi3+1): Delete.
From-SVN: r19385
Diffstat (limited to 'gcc')
-rw-r--r-- | gcc/ChangeLog | 5 | ||||
-rw-r--r-- | gcc/config/sh/sh.c | 12 | ||||
-rw-r--r-- | gcc/config/sh/sh.md | 60 |
3 files changed, 16 insertions, 61 deletions
diff --git a/gcc/ChangeLog b/gcc/ChangeLog index f6d49db..126e635 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,3 +1,8 @@ +Thu Apr 23 20:21:06 1997 J"orn Rennecke <amylaar@cygnus.co.uk> + + * sh.c (gen_ashift_hi): Implement right shifts via gen_ashift. + * sh.md (ashrhi3_k, lshrhi3_k, lshrhi3_m, lshrhi3, lshrhi3+1): Delete. + Wed Apr 22 17:07:35 1998 Michael Meissner <meissner@cygnus.com> * loop.c (note_addr_stored): Correct function to take 2 arguments, diff --git a/gcc/config/sh/sh.c b/gcc/config/sh/sh.c index 0c42313..447716c 100644 --- a/gcc/config/sh/sh.c +++ b/gcc/config/sh/sh.c @@ -916,13 +916,13 @@ gen_ashift_hi (type, n, reg) switch (type) { case ASHIFTRT: - emit_insn (gen_ashrhi3_k (reg, reg, GEN_INT (n))); - break; case LSHIFTRT: - if (n == 1) - emit_insn (gen_lshrhi3_m (reg, reg, GEN_INT (n))); - else - emit_insn (gen_lshrhi3_k (reg, reg, GEN_INT (n))); + /* We don't have HImode right shift operations because using the + ordinary 32 bit shift instructions for that doesn't generate proper + zero/sign extension. + gen_ashift_hi is only called in contexts where we know that the + sign extension works out correctly. */ + gen_ashift (type, n, gen_rtx_SUBREG (SImode, reg, 0)); break; case ASHIFT: emit_insn (gen_ashlhi3_k (reg, reg, GEN_INT (n))); diff --git a/gcc/config/sh/sh.md b/gcc/config/sh/sh.md index 8659ddc..e25f2b7 100644 --- a/gcc/config/sh/sh.md +++ b/gcc/config/sh/sh.md @@ -1208,14 +1208,11 @@ "shar %0" [(set_attr "type" "arith")]) -(define_insn "ashrhi3_k" - [(set (match_operand:HI 0 "arith_reg_operand" "=r") - (ashiftrt:HI (match_operand:HI 1 "arith_reg_operand" "0") - (match_operand:HI 2 "const_int_operand" "M"))) - (clobber (reg:SI 18))] - "INTVAL (operands[2]) == 1" - "shar %0" - [(set_attr "type" "arith")]) +;; We can't do HImode right shifts correctly unless we start out with an +;; explicit zero / sign extension; doing that would result in worse overall +;; code, so just let the machine independent code widen the mode. +;; That's why we don't have ashrhi3_k / lshrhi3_k / lshrhi3_m / lshrhi3 . + ;; ??? This should be a define expand. @@ -1328,24 +1325,6 @@ "shlr%O2 %0" [(set_attr "type" "arith")]) -(define_insn "lshrhi3_m" - [(set (match_operand:HI 0 "arith_reg_operand" "=r") - (lshiftrt:HI (match_operand:HI 1 "arith_reg_operand" "0") - (match_operand:HI 2 "const_int_operand" "M"))) - (clobber (reg:SI 18))] - "CONST_OK_FOR_M (INTVAL (operands[2]))" - "shlr %0" - [(set_attr "type" "arith")]) - -(define_insn "lshrhi3_k" - [(set (match_operand:HI 0 "arith_reg_operand" "=r") - (lshiftrt:HI (match_operand:HI 1 "arith_reg_operand" "0") - (match_operand:HI 2 "const_int_operand" "K")))] - "CONST_OK_FOR_K (INTVAL (operands[2])) - && ! CONST_OK_FOR_M (INTVAL (operands[2]))" - "shlr%O2 %0" - [(set_attr "type" "arith")]) - (define_insn "lshrsi3_n" [(set (match_operand:SI 0 "arith_reg_operand" "=r") (lshiftrt:SI (match_operand:SI 1 "arith_reg_operand" "0") @@ -1398,35 +1377,6 @@ FAIL; }") -(define_insn "lshrhi3" - [(set (match_operand:HI 0 "arith_reg_operand" "=r") - (lshiftrt:HI (match_operand:HI 1 "arith_reg_operand" "0") - (match_operand:HI 2 "const_int_operand" "n"))) - (clobber (reg:SI 18))] - "" - "#" -;; ??? length attribute is sometimes six instead of four. - [(set (attr "length") - (cond [(eq (symbol_ref "shift_insns_rtx (insn)") (const_int 1)) - (const_string "2") - (eq (symbol_ref "shift_insns_rtx (insn)") (const_int 2)) - (const_string "4")] - (const_string "6"))) - (set_attr "type" "arith")]) - -(define_split - [(set (match_operand:HI 0 "arith_reg_operand" "") - (lshiftrt:HI (match_operand:HI 1 "arith_reg_operand" "") - (match_operand:HI 2 "const_int_operand" "n"))) - (clobber (reg:SI 18))] - "" - [(use (reg:SI 0))] - " -{ - gen_shifty_hi_op (LSHIFTRT, operands); - DONE; -}") - ;; ??? This should be a define expand. (define_insn "ashldi3_k" |