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| author | Uros Bizjak <ubizjak@gmail.com> | 2018-05-31 19:51:27 +0200 |
|---|---|---|
| committer | Uros Bizjak <uros@gcc.gnu.org> | 2018-05-31 19:51:27 +0200 |
| commit | c9315097046c86e654871722e65f6da209e0c62a (patch) | |
| tree | b28691894b0d46bfd75cd83691908fec09e18356 /gcc | |
| parent | d258f4aa696e770d7a06f960c34531804e649900 (diff) | |
| download | gcc-c9315097046c86e654871722e65f6da209e0c62a.zip gcc-c9315097046c86e654871722e65f6da209e0c62a.tar.gz gcc-c9315097046c86e654871722e65f6da209e0c62a.tar.bz2 | |
sse.md (avx_vec_concat<mode>): Substitute concat_tg_mode mode attribute with xtg_mode.
* config/i386/sse.md (avx_vec_concat<mode>):
Substitute concat_tg_mode mode attribute with xtg_mode.
(<mask_codefor>avx512dq_broadcast<mode><mask_name>_1): Ditto.
(concat_tg_mode): Remove mode attribute.
From-SVN: r261031
Diffstat (limited to 'gcc')
| -rw-r--r-- | gcc/ChangeLog | 7 | ||||
| -rw-r--r-- | gcc/config/i386/sse.md | 17 |
2 files changed, 13 insertions, 11 deletions
diff --git a/gcc/ChangeLog b/gcc/ChangeLog index 2bdf916..a4563e0 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,3 +1,10 @@ +2018-05-31 Uros Bizjak <ubizjak@gmail.com> + + * config/i386/sse.md (avx_vec_concat<mode>): + Substitute concat_tg_mode mode attribute with xtg_mode. + (<mask_codefor>avx512dq_broadcast<mode><mask_name>_1): Ditto. + (concat_tg_mode): Remove mode attribute. + 2018-05-31 Martin Sebor <msebor@redhat.com> PR c/82063 diff --git a/gcc/config/i386/sse.md b/gcc/config/i386/sse.md index dd65e57..0825894 100644 --- a/gcc/config/i386/sse.md +++ b/gcc/config/i386/sse.md @@ -913,11 +913,6 @@ (V8DF "sd") (V4DF "sd") (V2DF "sd")]) ;; Tie mode of assembler operand to mode iterator -(define_mode_attr concat_tg_mode - [(V32QI "t") (V16HI "t") (V8SI "t") (V4DI "t") (V8SF "t") (V4DF "t") - (V64QI "g") (V32HI "g") (V16SI "g") (V8DI "g") (V16SF "g") (V8DF "g")]) - -;; Tie mode of assembler operand to mode iterator (define_mode_attr xtg_mode [(V16QI "x") (V8HI "x") (V4SI "x") (V2DI "x") (V4SF "x") (V2DF "x") (V32QI "t") (V16HI "t") (V8SI "t") (V4DI "t") (V8SF "t") (V4DF "t") @@ -18070,7 +18065,7 @@ (match_operand:<64x2mode> 1 "nonimmediate_operand" "v,m")))] "TARGET_AVX512DQ" "@ - vshuf<shuffletype>64x2\t{$0x0, %<concat_tg_mode>1, %<concat_tg_mode>1, %0<mask_operand2>|%0<mask_operand2>, %<concat_tg_mode>1, %<concat_tg_mode>1, 0x0} + vshuf<shuffletype>64x2\t{$0x0, %<xtg_mode>1, %<xtg_mode>1, %0<mask_operand2>|%0<mask_operand2>, %<xtg_mode>1, %<xtg_mode>1, 0x0} vbroadcast<shuffletype>64x2\t{%1, %0<mask_operand2>|%0<mask_operand2>, %1}" [(set_attr "type" "ssemov") (set_attr "prefix_extra" "1") @@ -18919,21 +18914,21 @@ switch (which_alternative) { case 0: - return "vinsert<i128>\t{$0x1, %2, %<concat_tg_mode>1, %0|%0, %<concat_tg_mode>1, %2, 0x1}"; + return "vinsert<i128>\t{$0x1, %2, %<xtg_mode>1, %0|%0, %<xtg_mode>1, %2, 0x1}"; case 1: if (<MODE_SIZE> == 64) { if (TARGET_AVX512DQ && GET_MODE_SIZE (<ssescalarmode>mode) == 4) - return "vinsert<shuffletype>32x8\t{$0x1, %2, %<concat_tg_mode>1, %0|%0, %<concat_tg_mode>1, %2, 0x1}"; + return "vinsert<shuffletype>32x8\t{$0x1, %2, %<xtg_mode>1, %0|%0, %<xtg_mode>1, %2, 0x1}"; else - return "vinsert<shuffletype>64x4\t{$0x1, %2, %<concat_tg_mode>1, %0|%0, %<concat_tg_mode>1, %2, 0x1}"; + return "vinsert<shuffletype>64x4\t{$0x1, %2, %<xtg_mode>1, %0|%0, %<xtg_mode>1, %2, 0x1}"; } else { if (TARGET_AVX512DQ && GET_MODE_SIZE (<ssescalarmode>mode) == 8) - return "vinsert<shuffletype>64x2\t{$0x1, %2, %<concat_tg_mode>1, %0|%0, %<concat_tg_mode>1, %2, 0x1}"; + return "vinsert<shuffletype>64x2\t{$0x1, %2, %<xtg_mode>1, %0|%0, %<xtg_mode>1, %2, 0x1}"; else - return "vinsert<shuffletype>32x4\t{$0x1, %2, %<concat_tg_mode>1, %0|%0, %<concat_tg_mode>1, %2, 0x1}"; + return "vinsert<shuffletype>32x4\t{$0x1, %2, %<xtg_mode>1, %0|%0, %<xtg_mode>1, %2, 0x1}"; } case 2: case 3: |