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| author | Pat Haugen <pthaugen@us.ibm.com> | 2017-02-27 16:06:13 +0000 |
|---|---|---|
| committer | Pat Haugen <pthaugen@gcc.gnu.org> | 2017-02-27 16:06:13 +0000 |
| commit | c8f28a3c7ae87e3114e5789fd3a20e46c3a879f6 (patch) | |
| tree | 6525f1e2b8504f02013c85ae627fa8f60c2af719 /gcc | |
| parent | 470c35ae22641f52ee03d2f4604f0391d60e5e22 (diff) | |
| download | gcc-c8f28a3c7ae87e3114e5789fd3a20e46c3a879f6.zip gcc-c8f28a3c7ae87e3114e5789fd3a20e46c3a879f6.tar.gz gcc-c8f28a3c7ae87e3114e5789fd3a20e46c3a879f6.tar.bz2 | |
re PR target/79544 (vec_sra (unsigned long long,foo) generating vsrd instead of vsrad)
PR target/79544
* config/rs6000/rs6000-c.c (struct altivec_builtin_types): Use VSRAD
for arithmetic shift of unsigned V2DI.
* gcc.target/powerpc/pr79544.c: New.
From-SVN: r245762
Diffstat (limited to 'gcc')
| -rw-r--r-- | gcc/ChangeLog | 6 | ||||
| -rw-r--r-- | gcc/config/rs6000/rs6000-c.c | 4 | ||||
| -rw-r--r-- | gcc/testsuite/ChangeLog | 5 | ||||
| -rw-r--r-- | gcc/testsuite/gcc.target/powerpc/pr79544.c | 15 |
4 files changed, 28 insertions, 2 deletions
diff --git a/gcc/ChangeLog b/gcc/ChangeLog index 76084d8..9c1025d 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,3 +1,9 @@ +2017-02-27 Pat Haugen <pthaugen@us.ibm.com> + + PR target/79544 + * config/rs6000/rs6000-c.c (struct altivec_builtin_types): Use VSRAD + for arithmetic shift of unsigned V2DI. + 2017-02-27 Claudiu Zissulescu <claziss@synopsys.com> * config.gcc (arc*-): Clean up, use arc/big.h, arc/elf.h, and diff --git a/gcc/config/rs6000/rs6000-c.c b/gcc/config/rs6000/rs6000-c.c index b0a7d33..20c17f0 100644 --- a/gcc/config/rs6000/rs6000-c.c +++ b/gcc/config/rs6000/rs6000-c.c @@ -2444,7 +2444,7 @@ const struct altivec_builtin_types altivec_overloaded_builtins[] = { RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, 0 }, { ALTIVEC_BUILTIN_VEC_SRA, P8V_BUILTIN_VSRAD, RS6000_BTI_V2DI, RS6000_BTI_V2DI, RS6000_BTI_unsigned_V2DI, 0 }, - { ALTIVEC_BUILTIN_VEC_SRA, P8V_BUILTIN_VSRD, + { ALTIVEC_BUILTIN_VEC_SRA, P8V_BUILTIN_VSRAD, RS6000_BTI_unsigned_V2DI, RS6000_BTI_unsigned_V2DI, RS6000_BTI_unsigned_V2DI, 0 }, { ALTIVEC_BUILTIN_VEC_VSRAW, ALTIVEC_BUILTIN_VSRAW, RS6000_BTI_V4SI, RS6000_BTI_V4SI, RS6000_BTI_unsigned_V4SI, 0 }, @@ -5012,7 +5012,7 @@ const struct altivec_builtin_types altivec_overloaded_builtins[] = { { P8V_BUILTIN_VEC_VSRAD, P8V_BUILTIN_VSRAD, RS6000_BTI_V2DI, RS6000_BTI_V2DI, RS6000_BTI_unsigned_V2DI, 0 }, - { P8V_BUILTIN_VEC_VSRAD, P8V_BUILTIN_VSRD, + { P8V_BUILTIN_VEC_VSRAD, P8V_BUILTIN_VSRAD, RS6000_BTI_unsigned_V2DI, RS6000_BTI_unsigned_V2DI, RS6000_BTI_unsigned_V2DI, 0 }, { P8V_BUILTIN_VEC_VSUBCUQ, P8V_BUILTIN_VSUBCUQ, diff --git a/gcc/testsuite/ChangeLog b/gcc/testsuite/ChangeLog index ef89807..55edc8a 100644 --- a/gcc/testsuite/ChangeLog +++ b/gcc/testsuite/ChangeLog @@ -1,3 +1,8 @@ +2017-02-27 Pat Haugen <pthaugen@us.ibm.com> + + PR target/79544 + * gcc.target/powerpc/pr79544.c: New. + 2017-02-27 Paolo Carlini <paolo.carlini@oracle.com> PR c++/79414 diff --git a/gcc/testsuite/gcc.target/powerpc/pr79544.c b/gcc/testsuite/gcc.target/powerpc/pr79544.c new file mode 100644 index 0000000..336c6d9 --- /dev/null +++ b/gcc/testsuite/gcc.target/powerpc/pr79544.c @@ -0,0 +1,15 @@ +/* { dg-do compile { target { powerpc*-*-* } } } */ +/* { dg-require-effective-target powerpc_p8vector_ok } */ +/* { dg-skip-if "do not override -mcpu" { powerpc*-*-* } { "-mcpu=*" } { "-mcpu=power8" } } */ +/* { dg-options "-mcpu=power8 -O2" } */ + +#include <altivec.h> + +vector unsigned long long +test_sra (vector unsigned long long x, vector unsigned long long y) +{ + return vec_sra (x, y); +} + +/* { dg-final { scan-assembler "vsrad" } } */ + |