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| author | Claudiu Zissulescu <claziss@synopsys.com> | 2016-10-13 13:48:02 +0200 |
|---|---|---|
| committer | Claudiu Zissulescu <claziss@gcc.gnu.org> | 2016-10-13 13:48:02 +0200 |
| commit | c59552242d60f0c89534dc1bed28f4a402a56e11 (patch) | |
| tree | 6c73411d0ea6644d455533c39559ed351f1068c3 /gcc | |
| parent | d4fe8839e67af87b08658d5a1c18098f6289a175 (diff) | |
| download | gcc-c59552242d60f0c89534dc1bed28f4a402a56e11.zip gcc-c59552242d60f0c89534dc1bed28f4a402a56e11.tar.gz gcc-c59552242d60f0c89534dc1bed28f4a402a56e11.tar.bz2 | |
[ARC] Fix mul32x16 patterns.
gcc/
2016-10-13 Claudiu Zissulescu <claziss@synopsys.com>
* config/arc/arc.md (umul_600): Change.
(umul64_600): Likewise.
From-SVN: r241105
Diffstat (limited to 'gcc')
| -rw-r--r-- | gcc/ChangeLog | 5 | ||||
| -rw-r--r-- | gcc/config/arc/arc.md | 18 |
2 files changed, 12 insertions, 11 deletions
diff --git a/gcc/ChangeLog b/gcc/ChangeLog index 708b322..90a8fcb 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,5 +1,10 @@ 2016-10-13 Claudiu Zissulescu <claziss@synopsys.com> + * config/arc/arc.md (umul_600): Remove predicated variant. + (umul64_600): Likewise. + +2016-10-13 Claudiu Zissulescu <claziss@synopsys.com> + * config/arc/arc.h (INSN_LENGTH_ALIGNMENT): Change. 2016-10-13 Bin Cheng <bin.cheng@arm.com> diff --git a/gcc/config/arc/arc.md b/gcc/config/arc/arc.md index 715da31..3c531d9 100644 --- a/gcc/config/arc/arc.md +++ b/gcc/config/arc/arc.md @@ -1939,13 +1939,11 @@ (const_int 0)))) (clobber (match_operand:SI 3 "acc1_operand" ""))] "TARGET_MULMAC_32BY16_SET" - "@mululw 0, %0, %1 - mululw 0, %0, %1 - mululw%? 0, %1, %0" + "mululw 0, %0, %1" [(set_attr "length" "4,4,8") - (set_attr "type" "mulmac_600, mulmac_600, mulmac_600") - (set_attr "predicable" "no, no, yes") - (set_attr "cond" "nocond, canuse_limm, canuse")]) + (set_attr "type" "mulmac_600") + (set_attr "predicable" "no") + (set_attr "cond" "nocond")]) (define_insn "mac_600" [(set (match_operand:SI 2 "acc2_operand" "") @@ -2374,13 +2372,11 @@ (const_int 0)))) ] "TARGET_MULMAC_32BY16_SET" - "@mululw 0, %0, %1 - mululw 0, %0, %1 - mululw%? 0, %1, %0" + "mululw 0, %0, %1" [(set_attr "length" "4,4,8") (set_attr "type" "mulmac_600") - (set_attr "predicable" "no,no,yes") - (set_attr "cond" "nocond, canuse_limm, canuse")]) + (set_attr "predicable" "no") + (set_attr "cond" "nocond")]) (define_insn "umac64_600" |