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| author | Jeffrey A Law <law@cygnus.com> | 1999-06-29 02:01:08 +0000 |
|---|---|---|
| committer | Jeff Law <law@gcc.gnu.org> | 1999-06-28 20:01:08 -0600 |
| commit | be8b493b636d0783086eef0926a60b50039159df (patch) | |
| tree | 0a52a4dd401943f2037298692284b840f38a7655 /gcc | |
| parent | 35393415f4485371bdde5310515c1e44445ba428 (diff) | |
| download | gcc-be8b493b636d0783086eef0926a60b50039159df.zip gcc-be8b493b636d0783086eef0926a60b50039159df.tar.gz gcc-be8b493b636d0783086eef0926a60b50039159df.tar.bz2 | |
* mips.md (leasi, leadi): New patterns.
From-SVN: r27827
Diffstat (limited to 'gcc')
| -rw-r--r-- | gcc/ChangeLog | 2 | ||||
| -rw-r--r-- | gcc/config/mips/mips.md | 24 |
2 files changed, 26 insertions, 0 deletions
diff --git a/gcc/ChangeLog b/gcc/ChangeLog index 5fe0286..793d9d0 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,5 +1,7 @@ Tue Jun 29 01:37:53 1999 Jeffrey A Law (law@cygnus.com) + * mips.md (leasi, leadi): New patterns. + * expr.c (emit_block_move): Properly handle case where one of the block move arguments has a queued increment or decrement. (clear_storage): Similarly. Fix formatting goof. diff --git a/gcc/config/mips/mips.md b/gcc/config/mips/mips.md index fb739b8..c3a6ba7 100644 --- a/gcc/config/mips/mips.md +++ b/gcc/config/mips/mips.md @@ -10395,3 +10395,27 @@ move\\t%0,%z4\\n\\ [(set_attr "type" "branch") (set_attr "mode" "none") (set_attr "length" "8")]) + +;; For the rare case where we need to load an address into a register +;; that can not be recognized by the normal movsi/addsi instructions. +;; I have no idea how many insns this can actually generate. It should +;; be rare, so over-estimating as 10 instructions should not have any +;; real performance impact. +(define_insn "leasi" + [(set (match_operand:SI 0 "register_operand" "=d") + (match_operand:SI 1 "address_operand" "p"))] + "Pmode == SImode" + "la %0,%a1" + [(set_attr "type" "arith") + (set_attr "mode" "SI") + (set_attr "length" "40")]) + +;; Similarly for targets where we have 64bit pointers. +(define_insn "leadi" + [(set (match_operand:DI 0 "register_operand" "=d") + (match_operand:DI 1 "address_operand" "p"))] + "Pmode == DImode" + "la %0,%a1" + [(set_attr "type" "arith") + (set_attr "mode" "DI") + (set_attr "length" "40")]) |