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authorJim Wilson <wilson@gcc.gnu.org>1995-03-10 11:08:02 -0800
committerJim Wilson <wilson@gcc.gnu.org>1995-03-10 11:08:02 -0800
commitb9b7c1c9fd7cdb6717c5f58f80326f518158561f (patch)
tree7a03a417cd44f464b262aabb87fa6a9eec215165 /gcc
parent41b455df14d4460e1becf590b7b841145f5b8204 (diff)
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(movdi define_split, movdf define_split): Correct indentation and formatting.
(movdi define_split, movdf define_split): Correct indentation and formatting. Make the condition fail if an operand is a MEM with an auto-inc address. From-SVN: r9160
Diffstat (limited to 'gcc')
-rw-r--r--gcc/config/sh/sh.md30
1 files changed, 20 insertions, 10 deletions
diff --git a/gcc/config/sh/sh.md b/gcc/config/sh/sh.md
index 93bb135..df475e4 100644
--- a/gcc/config/sh/sh.md
+++ b/gcc/config/sh/sh.md
@@ -1064,17 +1064,24 @@
;; If the output is a register and the input is memory, we have to be careful
;; and see which word needs to be loaded first.
-;;
+
+;; ??? Why are Q constraint addresses rejected here but not in the DFmode
+;; split pattern?
+
(define_split
[(set (match_operand:DI 0 "general_movdst_operand" "")
(match_operand:DI 1 "general_movsrc_operand" ""))]
- "! (GET_CODE (operands[0]) == REG
- && REGNO (operands[0]) >= FIRST_PSEUDO_REGISTER)
+ "! (GET_CODE (operands[0]) == REG
+ && REGNO (operands[0]) >= FIRST_PSEUDO_REGISTER)
&& ! (GET_CODE (operands[1]) == REG
&& REGNO (operands[1]) >= FIRST_PSEUDO_REGISTER)
&& ! (GET_CODE (operands[0]) == REG && GET_CODE (operands[1]) == REG
- && ! reload_completed
- && reg_overlap_mentioned_p (operands[0], operands[1]))
+ && ! reload_completed
+ && reg_overlap_mentioned_p (operands[0], operands[1]))
+ && ! (GET_CODE (operands[0]) == MEM
+ && GET_CODE (XEXP (operands[0], 0)) == PRE_DEC)
+ && ! (GET_CODE (operands[1]) == MEM
+ && GET_CODE (XEXP (operands[1], 0)) == POST_INC)
&& ! EXTRA_CONSTRAINT_Q (operands[1])"
[(set (match_dup 2) (match_dup 3))
(set (match_dup 4) (match_dup 5))]
@@ -1123,13 +1130,17 @@
(define_split
[(set (match_operand:DF 0 "general_movdst_operand" "")
(match_operand:DF 1 "general_movsrc_operand" ""))]
- "! (GET_CODE (operands[0]) == REG
- && REGNO (operands[0]) >= FIRST_PSEUDO_REGISTER)
+ "! (GET_CODE (operands[0]) == REG
+ && REGNO (operands[0]) >= FIRST_PSEUDO_REGISTER)
&& ! (GET_CODE (operands[1]) == REG
&& REGNO (operands[1]) >= FIRST_PSEUDO_REGISTER)
&& ! (GET_CODE (operands[0]) == REG && GET_CODE (operands[1]) == REG
- && ! reload_completed
- && reg_overlap_mentioned_p (operands[0], operands[1]))"
+ && ! reload_completed
+ && reg_overlap_mentioned_p (operands[0], operands[1]))
+ && ! (GET_CODE (operands[0]) == MEM
+ && GET_CODE (XEXP (operands[0], 0)) == PRE_DEC)
+ && ! (GET_CODE (operands[1]) == MEM
+ && GET_CODE (XEXP (operands[1], 0)) == POST_INC)"
[(set (match_dup 2) (match_dup 3))
(set (match_dup 4) (match_dup 5))]
"
@@ -1155,7 +1166,6 @@
FAIL;
}")
-
(define_expand "movdf"
[(set (match_operand:DF 0 "general_movdst_operand" "")
(match_operand:DF 1 "general_movsrc_operand" ""))]