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author | Oleg Endo <oleg.endo@t-online.de> | 2011-09-22 00:41:38 +0000 |
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committer | Kaz Kojima <kkojima@gcc.gnu.org> | 2011-09-22 00:41:38 +0000 |
commit | b7cf894ffac8266691a362a7b24fd3f086a60e38 (patch) | |
tree | 0edb8e6594060fd5f59dedbf5f564d939ec21c4a /gcc | |
parent | f4d7f828662ea47fd418a49e718122cb408002a6 (diff) | |
download | gcc-b7cf894ffac8266691a362a7b24fd3f086a60e38.zip gcc-b7cf894ffac8266691a362a7b24fd3f086a60e38.tar.gz gcc-b7cf894ffac8266691a362a7b24fd3f086a60e38.tar.bz2 |
sh.c (andcosts): Renamed to and_xor_ior_costs.
* config/sh/sh.c (andcosts): Renamed to and_xor_ior_costs.
Added AND special case. Adapted comments.
(sh_rtx_costs): Added XOR and IOR case.
From-SVN: r179073
Diffstat (limited to 'gcc')
-rw-r--r-- | gcc/ChangeLog | 6 | ||||
-rw-r--r-- | gcc/config/sh/sh.c | 24 |
2 files changed, 20 insertions, 10 deletions
diff --git a/gcc/ChangeLog b/gcc/ChangeLog index 44e9513..6442cb8 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,3 +1,9 @@ +2011-09-22 Oleg Endo <oleg.endo@t-online.de> + + * config/sh/sh.c (andcosts): Renamed to and_xor_ior_costs. + Added AND special case. Adapted comments. + (sh_rtx_costs): Added XOR and IOR case. + 2011-09-21 Jan Hubicka <jh@suse.cz> * ipa-inline-analsis.c (compute_inline_parameters): Set diff --git a/gcc/config/sh/sh.c b/gcc/config/sh/sh.c index 93477ff..c0bfdd3 100644 --- a/gcc/config/sh/sh.c +++ b/gcc/config/sh/sh.c @@ -242,7 +242,7 @@ static void sh_file_start (void); static int flow_dependent_p (rtx, rtx); static void flow_dependent_p_1 (rtx, const_rtx, void *); static int shiftcosts (rtx); -static int andcosts (rtx); +static int and_xor_ior_costs (rtx, int code); static int addsubcosts (rtx); static int multcosts (rtx); static bool unspec_caller_rtx_p (rtx); @@ -2830,14 +2830,15 @@ shiftcosts (rtx x) return shift_insns[value]; } -/* Return the cost of an AND operation. */ +/* Return the cost of an AND/XOR/IOR operation. */ static inline int -andcosts (rtx x) +and_xor_ior_costs (rtx x, int code) { int i; - /* Anding with a register is a single cycle and instruction. */ + /* A logical operation with two registers is a single cycle + instruction. */ if (!CONST_INT_P (XEXP (x, 1))) return 1; @@ -2853,17 +2854,18 @@ andcosts (rtx x) } /* These constants are single cycle extu.[bw] instructions. */ - if (i == 0xff || i == 0xffff) + if ((i == 0xff || i == 0xffff) && code == AND) return 1; - /* Constants that can be used in an and immediate instruction in a single - cycle, but this requires r0, so make it a little more expensive. */ + /* Constants that can be used in an instruction as an immediate are + a single cycle, but this requires r0, so make it a little more + expensive. */ if (CONST_OK_FOR_K08 (i)) return 2; - /* Constants that can be loaded with a mov immediate and an and. + /* Constants that can be loaded with a mov immediate need one more cycle. This case is probably unnecessary. */ if (CONST_OK_FOR_I08 (i)) return 2; - /* Any other constants requires a 2 cycle pc-relative load plus an and. + /* Any other constant requires an additional 2 cycle pc-relative load. This case is probably unnecessary. */ return 3; } @@ -3032,7 +3034,9 @@ sh_rtx_costs (rtx x, int code, int outer_code, int opno ATTRIBUTE_UNUSED, return true; case AND: - *total = COSTS_N_INSNS (andcosts (x)); + case XOR: + case IOR: + *total = COSTS_N_INSNS (and_xor_ior_costs (x, code)); return true; case MULT: |